From: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Date: Mon, 24 Aug 2020 18:02:15 +0000 (-0400)
Subject: panfrost: Inline vt_update_{rasterizer, occlusion}
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1357eec801c0b19b383b2a21e35a4fb95407e289;p=mesa.git

panfrost: Inline vt_update_{rasterizer, occlusion}

These are simple enough that the abstraction will get in the way of the
upcoming refactor. Let's keep all the state together.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6476>
---

diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.c b/src/gallium/drivers/panfrost/pan_cmdstream.c
index dc6b2ffe18f..617efa46b75 100644
--- a/src/gallium/drivers/panfrost/pan_cmdstream.c
+++ b/src/gallium/drivers/panfrost/pan_cmdstream.c
@@ -73,22 +73,6 @@ panfrost_vt_emit_shared_memory(struct panfrost_batch *batch)
         return panfrost_pool_upload_aligned(&batch->pool, &shared, sizeof(shared), 64);
 }
 
-static void
-panfrost_vt_update_rasterizer(struct panfrost_rasterizer *rasterizer,
-                              struct mali_vertex_tiler_prefix *prefix,
-                              struct mali_vertex_tiler_postfix *postfix)
-{
-        postfix->gl_enables |= 0x7;
-        SET_BIT(postfix->gl_enables, MALI_FRONT_CCW_TOP,
-                rasterizer->base.front_ccw);
-        SET_BIT(postfix->gl_enables, MALI_CULL_FACE_FRONT,
-                (rasterizer->base.cull_face & PIPE_FACE_FRONT));
-        SET_BIT(postfix->gl_enables, MALI_CULL_FACE_BACK,
-                (rasterizer->base.cull_face & PIPE_FACE_BACK));
-        SET_BIT(prefix->unknown_draw, MALI_DRAW_FLATSHADE_FIRST,
-                rasterizer->base.flatshade_first);
-}
-
 void
 panfrost_vt_update_primitive_size(struct panfrost_context *ctx,
                                   struct mali_vertex_tiler_prefix *prefix,
@@ -105,22 +89,6 @@ panfrost_vt_update_primitive_size(struct panfrost_context *ctx,
         }
 }
 
-static void
-panfrost_vt_update_occlusion_query(struct panfrost_context *ctx,
-                                   struct mali_vertex_tiler_postfix *postfix)
-{
-        SET_BIT(postfix->gl_enables, MALI_OCCLUSION_QUERY, ctx->occlusion_query);
-        if (ctx->occlusion_query) {
-                postfix->occlusion_counter = ctx->occlusion_query->bo->gpu;
-                panfrost_batch_add_bo(ctx->batch, ctx->occlusion_query->bo,
-                                      PAN_BO_ACCESS_SHARED |
-                                      PAN_BO_ACCESS_RW |
-                                      PAN_BO_ACCESS_FRAGMENT);
-        } else {
-                postfix->occlusion_counter = 0;
-        }
-}
-
 void
 panfrost_vt_init(struct panfrost_context *ctx,
                  enum pipe_shader_type stage,
@@ -145,8 +113,25 @@ panfrost_vt_init(struct panfrost_context *ctx,
         }
 
         if (stage == PIPE_SHADER_FRAGMENT) {
-                panfrost_vt_update_occlusion_query(ctx, postfix);
-                panfrost_vt_update_rasterizer(ctx->rasterizer, prefix, postfix);
+                if (ctx->occlusion_query) {
+                        postfix->gl_enables |= MALI_OCCLUSION_QUERY;
+                        postfix->occlusion_counter = ctx->occlusion_query->bo->gpu;
+                        panfrost_batch_add_bo(ctx->batch, ctx->occlusion_query->bo,
+                                              PAN_BO_ACCESS_SHARED |
+                                              PAN_BO_ACCESS_RW |
+                                              PAN_BO_ACCESS_FRAGMENT);
+                }
+
+                postfix->gl_enables |= 0x7;
+                struct pipe_rasterizer_state *rast = &ctx->rasterizer->base;
+                SET_BIT(postfix->gl_enables, MALI_FRONT_CCW_TOP,
+                        rast->front_ccw);
+                SET_BIT(postfix->gl_enables, MALI_CULL_FACE_FRONT,
+                        (rast->cull_face & PIPE_FACE_FRONT));
+                SET_BIT(postfix->gl_enables, MALI_CULL_FACE_BACK,
+                        (rast->cull_face & PIPE_FACE_BACK));
+                SET_BIT(prefix->unknown_draw, MALI_DRAW_FLATSHADE_FIRST,
+                        rast->flatshade_first);
         }
 }