From: Sebastien Bourdeauducq Date: Tue, 14 Feb 2012 14:52:39 +0000 (+0100) Subject: s6ddrphy: prepare quilt X-Git-Tag: 24jan2021_ls180~3242 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1368b666dfc848279925620f78fe0ea8d47a84b1;p=litex.git s6ddrphy: prepare quilt --- diff --git a/.gitignore b/.gitignore index 9d2acfa3..15832e33 100644 --- a/.gitignore +++ b/.gitignore @@ -6,3 +6,5 @@ build/* tools/bin2hex tools/flterm tools/mkmmimg +verilog/s6ddrphy/*.v +verilog/s6ddrphy/.pc diff --git a/verilog/s6ddrphy/README b/verilog/s6ddrphy/README new file mode 100644 index 00000000..eddbdd07 --- /dev/null +++ b/verilog/s6ddrphy/README @@ -0,0 +1 @@ +The Verilog files of the Spartan-6 DDR PHY from Xilinx/Northwest Logic go here. diff --git a/verilog/s6ddrphy/patches/s6ddrphy.diff b/verilog/s6ddrphy/patches/s6ddrphy.diff new file mode 100644 index 00000000..e69de29b diff --git a/verilog/s6ddrphy/patches/series b/verilog/s6ddrphy/patches/series new file mode 100644 index 00000000..dd08e5b7 --- /dev/null +++ b/verilog/s6ddrphy/patches/series @@ -0,0 +1 @@ +s6ddrphy.diff