From: Wei Mi Date: Mon, 1 Apr 2013 17:27:46 +0000 (+0000) Subject: i386.md (*ashl3_mask): Rewrite as define_insn. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=136fb3f734a18e6759988346b1c8d3e34e67d05a;p=gcc.git i386.md (*ashl3_mask): Rewrite as define_insn. 2013-04-01 Wei Mi * config/i386/i386.md (*ashl3_mask): Rewrite as define_insn. Truncate operand 2 using %b asm operand modifier. (*3_mask): Ditto. (*3_mask): Ditto. From-SVN: r197308 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 48977bf1586..7c7db0c3080 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-04-01 Wei Mi + + * config/i386/i386.md (*ashl3_mask): Rewrite as define_insn. + Truncate operand 2 using %b asm operand modifier. + (*3_mask): Ditto. + (*3_mask): Ditto. + 2013-04-01 Steven Bosscher PR middle-end/56798 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index bf0020cf692..5b794a1b827 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -8647,28 +8647,20 @@ }) ;; Avoid useless masking of count operand. -(define_insn_and_split "*ashl3_mask" +(define_insn "*ashl3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (ashift:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "nonimmediate_operand" "c") + (match_operand:SI 2 "register_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (ASHIFT, mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1" - "#" - "&& 1" - [(parallel [(set (match_dup 0) - (ashift:SWI48 (match_dup 1) (match_dup 2))) - (clobber (reg:CC FLAGS_REG))])] { - if (can_create_pseudo_p ()) - operands [2] = force_reg (SImode, operands[2]); - - operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); + return "sal{}\t{%b2, %0|%0, %b2}"; } [(set_attr "type" "ishift") (set_attr "mode" "")]) @@ -9157,28 +9149,20 @@ "ix86_expand_binary_operator (, mode, operands); DONE;") ;; Avoid useless masking of count operand. -(define_insn_and_split "*3_mask" +(define_insn "*3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (any_shiftrt:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "nonimmediate_operand" "c") + (match_operand:SI 2 "register_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (, mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1" - "#" - "&& 1" - [(parallel [(set (match_dup 0) - (any_shiftrt:SWI48 (match_dup 1) (match_dup 2))) - (clobber (reg:CC FLAGS_REG))])] { - if (can_create_pseudo_p ()) - operands [2] = force_reg (SImode, operands[2]); - - operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); + return "{}\t{%b2, %0|%0, %b2}"; } [(set_attr "type" "ishift") (set_attr "mode" "")]) @@ -9620,28 +9604,20 @@ "ix86_expand_binary_operator (, mode, operands); DONE;") ;; Avoid useless masking of count operand. -(define_insn_and_split "*3_mask" +(define_insn "*3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (any_rotate:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "nonimmediate_operand" "c") + (match_operand:SI 2 "register_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (, mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1" - "#" - "&& 1" - [(parallel [(set (match_dup 0) - (any_rotate:SWI48 (match_dup 1) (match_dup 2))) - (clobber (reg:CC FLAGS_REG))])] { - if (can_create_pseudo_p ()) - operands [2] = force_reg (SImode, operands[2]); - - operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); + return "{}\t{%b2, %0|%0, %b2}"; } [(set_attr "type" "rotate") (set_attr "mode" "")])