From: Alexandre Oliva <aoliva@redhat.com>
Date: Tue, 4 Jul 2000 06:39:39 +0000 (+0000)
Subject: * armemu.c (LoadSMult): Use WriteR15() to discard the least
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=13b6dd6f68d9eb79f9d3dbe730ec1b6aa9bef737;p=binutils-gdb.git

* armemu.c (LoadSMult): Use WriteR15() to discard the least
significant bits of PC.
---

diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index 526b49d05ef..06345b2fd75 100644
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,5 +1,8 @@
 2000-07-04  Alexandre Oliva  <aoliva@redhat.com>
 
+	* armemu.c (LoadSMult): Use WriteR15() to discard the least
+	significant bits of PC.
+
 	* armemu.h (WRITEDESTB): New macro.
 	* armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to
 	modify PC.  Moved the existing logic...
diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index 2fc0eda5f57..43cd6dc8044 100644
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -3544,7 +3544,7 @@ LoadSMult (ARMul_State * state, ARMword instr,
 	  state->Cpsr = GETSPSR (state->Bank);
 	  ARMul_CPSRAltered (state);
 	}
-      state->Reg[15] = PC;
+      WriteR15 (state, PC);
 #else
       if (state->Mode == USER26MODE || state->Mode == USER32MODE)
 	{			/* protect bits in user mode */
@@ -3555,8 +3555,8 @@ LoadSMult (ARMul_State * state, ARMword instr,
 	}
       else
 	ARMul_R15Altered (state);
-#endif
       FLUSHPIPE;
+#endif
     }
 
   if (!BIT (15) && state->Mode != USER26MODE && state->Mode != USER32MODE)