From: Peter Bergner Date: Wed, 28 Mar 2018 20:09:02 +0000 (-0500) Subject: re PR target/84912 (__builtin_divde* produce Internal Compiler Error when compiled... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1429da42b8a74f6116e4768c6763b13bd7993f20;p=gcc.git re PR target/84912 (__builtin_divde* produce Internal Compiler Error when compiled -m32) gcc/ PR target/84912 * config/rs6000/rs6000-builtin.def (DIVWEO): Delete macro expansion. (DIVWEUO): Likewise. (DIVDEO): Likewise. (DIVDEUO): Likewise. * config/rs6000/rs6000.c (builtin_function_type): Remove support for DIVWEUO and DIVDEUO. * config/rs6000/rs6000.md (UNSPEC_DIVEO, UNSPEC_DIVEUO): Delete unspecs. (UNSPEC_DIV_EXTEND): Remove deleted unspecs. (div_extend): Likewise. * doc/extend.texi (__builtin_divweo): Remove documention for deleted builtin function. (__builtin_divweuo): Likewise. (__builtin_divdeo): Likewise. (__builtin_divdeuo): Likewise. gcc/testsuite/ PR target/84912 * gcc.target/powerpc/extend-divide-1.c (div_weo): Remove test for deleted builtin function. (div_weuo): Likewise. * gcc.target/powerpc/extend-divide-2.c (div_deo): Likewise. (div_deuo): Likewise. From-SVN: r258933 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8da14418a39..d92fcf74990 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,21 @@ +2018-03-28 Peter Bergner + + PR target/84912 + * config/rs6000/rs6000-builtin.def (DIVWEO): Delete macro expansion. + (DIVWEUO): Likewise. + (DIVDEO): Likewise. + (DIVDEUO): Likewise. + * config/rs6000/rs6000.c (builtin_function_type): Remove support for + DIVWEUO and DIVDEUO. + * config/rs6000/rs6000.md (UNSPEC_DIVEO, UNSPEC_DIVEUO): Delete unspecs. + (UNSPEC_DIV_EXTEND): Remove deleted unspecs. + (div_extend): Likewise. + * doc/extend.texi (__builtin_divweo): Remove documention for deleted + builtin function. + (__builtin_divweuo): Likewise. + (__builtin_divdeo): Likewise. + (__builtin_divdeuo): Likewise. + 2018-03-28 Jakub Jelinek PR target/85095 diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index bc75be57184..6bf972adfc1 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -2310,13 +2310,9 @@ BU_P9V_OVERLOAD_1 (VCTZLSBB, "vctzlsbb") /* 2 argument extended divide functions added in ISA 2.06. */ BU_P7_MISC_2 (DIVWE, "divwe", CONST, dive_si) -BU_P7_MISC_2 (DIVWEO, "divweo", CONST, diveo_si) BU_P7_MISC_2 (DIVWEU, "divweu", CONST, diveu_si) -BU_P7_MISC_2 (DIVWEUO, "divweuo", CONST, diveuo_si) BU_P7_MISC_2 (DIVDE, "divde", CONST, dive_di) -BU_P7_MISC_2 (DIVDEO, "divdeo", CONST, diveo_di) BU_P7_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di) -BU_P7_MISC_2 (DIVDEUO, "divdeuo", CONST, diveuo_di) /* 1 argument DFP (decimal floating point) functions added in ISA 2.05. */ BU_DFP_MISC_1 (DXEX, "dxex", CONST, dfp_dxex_dd) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 37c55f43c56..cecf7e31fbd 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -18053,9 +18053,7 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, case CRYPTO_BUILTIN_VPMSUM: case MISC_BUILTIN_ADDG6S: case MISC_BUILTIN_DIVWEU: - case MISC_BUILTIN_DIVWEUO: case MISC_BUILTIN_DIVDEU: - case MISC_BUILTIN_DIVDEUO: case VSX_BUILTIN_UDIV_V2DI: case ALTIVEC_BUILTIN_VMAXUB: case ALTIVEC_BUILTIN_VMINUB: diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7b285efb100..faae3578ca6 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -130,9 +130,7 @@ UNSPEC_CDTBCD UNSPEC_CBCDTD UNSPEC_DIVE - UNSPEC_DIVEO UNSPEC_DIVEU - UNSPEC_DIVEUO UNSPEC_UNPACK_128BIT UNSPEC_PACK_128BIT UNSPEC_LSQ @@ -13863,14 +13861,10 @@ (set_attr "length" "4")]) (define_int_iterator UNSPEC_DIV_EXTEND [UNSPEC_DIVE - UNSPEC_DIVEO - UNSPEC_DIVEU - UNSPEC_DIVEUO]) + UNSPEC_DIVEU]) (define_int_attr div_extend [(UNSPEC_DIVE "e") - (UNSPEC_DIVEO "eo") - (UNSPEC_DIVEU "eu") - (UNSPEC_DIVEUO "euo")]) + (UNSPEC_DIVEU "eu")]) (define_insn "div_" [(set (match_operand:GPR 0 "register_operand" "=r") diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 93a0ebc97f1..cb0d9c0fed7 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -15820,22 +15820,17 @@ or @option{-mpopcntd}): @smallexample long __builtin_bpermd (long, long); int __builtin_divwe (int, int); -int __builtin_divweo (int, int); unsigned int __builtin_divweu (unsigned int, unsigned int); -unsigned int __builtin_divweuo (unsigned int, unsigned int); long __builtin_divde (long, long); -long __builtin_divdeo (long, long); unsigned long __builtin_divdeu (unsigned long, unsigned long); -unsigned long __builtin_divdeuo (unsigned long, unsigned long); unsigned int cdtbcd (unsigned int); unsigned int cbcdtd (unsigned int); unsigned int addg6s (unsigned int, unsigned int); void __builtin_rs6000_speculation_barrier (void); @end smallexample -The @code{__builtin_divde}, @code{__builtin_divdeo}, -@code{__builtin_divdeu}, @code{__builtin_divdeou} functions require a -64-bit environment support ISA 2.06 or later. +The @code{__builtin_divde} and @code{__builtin_divdeu} functions +require a 64-bit environment supporting ISA 2.06 or later. The following built-in functions are available for the PowerPC family of processors, starting with ISA 3.0 or later (@option{-mcpu=power9}): diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d8ec226391c..bb665fcfdf9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2018-03-28 Peter Bergner + + PR target/84912 + * gcc.target/powerpc/extend-divide-1.c (div_weo): Remove test for + deleted builtin function. + (div_weuo): Likewise. + * gcc.target/powerpc/extend-divide-2.c (div_deo): Likewise. + (div_deuo): Likewise. + 2018-03-28 Paolo Carlini PR c++/85028 diff --git a/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c b/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c index 8e08878b5e3..572f6abaacf 100644 --- a/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c +++ b/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c @@ -5,9 +5,7 @@ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ /* { dg-final { scan-assembler-times "divwe " 1 } } */ -/* { dg-final { scan-assembler-times "divweo " 1 } } */ /* { dg-final { scan-assembler-times "divweu " 1 } } */ -/* { dg-final { scan-assembler-times "divweuo " 1 } } */ /* { dg-final { scan-assembler-not "bl __builtin" } } */ int @@ -16,20 +14,8 @@ div_we (int a, int b) return __builtin_divwe (a, b); } -int -div_weo (int a, int b) -{ - return __builtin_divweo (a, b); -} - unsigned int div_weu (unsigned int a, unsigned int b) { return __builtin_divweu (a, b); } - -unsigned int -div_weuo (unsigned int a, unsigned int b) -{ - return __builtin_divweuo (a, b); -} diff --git a/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c b/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c index d930247cd2a..0b5a9ae379b 100644 --- a/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c +++ b/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c @@ -5,9 +5,7 @@ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ /* { dg-final { scan-assembler-times "divde " 1 } } */ -/* { dg-final { scan-assembler-times "divdeo " 1 } } */ /* { dg-final { scan-assembler-times "divdeu " 1 } } */ -/* { dg-final { scan-assembler-times "divdeuo " 1 } } */ /* { dg-final { scan-assembler-not "bl __builtin" } } */ long @@ -16,20 +14,8 @@ div_de (long a, long b) return __builtin_divde (a, b); } -long -div_deo (long a, long b) -{ - return __builtin_divdeo (a, b); -} - unsigned long div_deu (unsigned long a, unsigned long b) { return __builtin_divdeu (a, b); } - -unsigned long -div_deuo (unsigned long a, unsigned long b) -{ - return __builtin_divdeuo (a, b); -}