From: Luke Kenneth Casson Leighton Date: Sun, 14 Oct 2018 04:45:40 +0000 (+0100) Subject: replace | operator with rv_or X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=145da942ae1ac30e865f786551ccbfd7f60bb43f;p=riscv-isa-sim.git replace | operator with rv_or --- diff --git a/riscv/insns/or.h b/riscv/insns/or.h index 3f2fffc..631644a 100644 --- a/riscv/insns/or.h +++ b/riscv/insns/or.h @@ -1 +1 @@ -WRITE_RD(RS1 | RS2); +WRITE_RD(rv_or(RS1, RS2)); diff --git a/riscv/insns/ori.h b/riscv/insns/ori.h index 6403c39..6369ae5 100644 --- a/riscv/insns/ori.h +++ b/riscv/insns/ori.h @@ -1 +1 @@ -WRITE_RD(insn.i_imm() | RS1); +WRITE_RD(rv_or(insn.i_imm(), RS1)); diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index 34ee0ca..475f86e 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -247,3 +247,8 @@ reg_t sv_proc_t::rv_and(reg_t lhs, reg_t rhs) return lhs & rhs; } +reg_t sv_proc_t::rv_or(reg_t lhs, reg_t rhs) +{ + return lhs | rhs; +} + diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h index 71b9801..3f133be 100644 --- a/riscv/sv_insn_redirect.h +++ b/riscv/sv_insn_redirect.h @@ -100,6 +100,7 @@ public: sreg_t rv_div(sreg_t lhs, sreg_t rhs); reg_t rv_mul(reg_t lhs, reg_t rhs); reg_t rv_and(reg_t lhs, reg_t rhs); + reg_t rv_or(reg_t lhs, reg_t rhs); #include "sv_insn_decl.h" };