From: lkcl <lkcl@web>
Date: Wed, 9 Mar 2022 00:58:22 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3117
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=146e7339ad953f7349130da6f9ac712d630ec3e6;p=libreriscv.git

---

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index f50892144..014c78e7d 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -12,6 +12,8 @@
 
 **DRAFT STATUS**
 
+<https://libre-soc.org/openpower/isa/bitmanip/>
+
 this extension amalgamates bitmanipulation primitives from many sources, including RISC-V bitmanip, Packed SIMD, AVX-512 and OpenPOWER VSX.  Vectorisation and SIMD are removed: these are straight scalar (element) operations making them suitable for embedded applications.
 Vectorisation Context is provided by [[openpower/sv]].