From: Luke Kenneth Casson Leighton Date: Mon, 26 Nov 2018 04:50:26 +0000 (+0000) Subject: start adding csrs X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=14730237a7819d4043be869606f75ba660389f09;p=rv32.git start adding csrs --- diff --git a/cpu.py b/cpu.py index 9d50e59..3b7b802 100644 --- a/cpu.py +++ b/cpu.py @@ -461,44 +461,24 @@ class CPU(Module): csr_written_value = Signal() c = {} + # cycle + c[csr_cycle] = csr_output_value.eq(minfo.cycle_counter[0:32]) + c[csr_cycleh] = csr_output_value.eq(minfo.cycle_counter[32:64]) + # time + c[csr_time] = csr_output_value.eq(minfo.time_counter[0:32]) + c[csr_timeh] = csr_output_value.eq(minfo.time_counter[32:64]) + # instret + c[csr_instret] = csr_output_value.eq(minfo.instret_counter[0:32]) + c[csr_instreth] = csr_output_value.eq(minfo.instret_counter[32:64]) + # mvendorid/march/mimpl/mhart + c[csr_mvendorid] = csr_output_value.eq(minfo.mvendorid) + c[csr_marchid ] = csr_output_value.eq(minfo.marchid ) + c[csr_mimpid ] = csr_output_value.eq(minfo.mimpid ) + c[csr_mhartid ] = csr_output_value.eq(minfo.mhartid ) + return Case(csr.number, c) """ - reg [31:0] csr_output_value; - reg [31:0] csr_written_value; - csr_output_value = 32'hXXXXXXXX; - csr_written_value = 32'hXXXXXXXX; - case(csr_number) - `csr_cycle: begin - csr_output_value = cycle_counter[31:0]; - end - `csr_time: begin - csr_output_value = time_counter[31:0]; - end - `csr_instret: begin - csr_output_value = instret_counter[31:0]; - end - `csr_cycleh: begin - csr_output_value = cycle_counter[63:32]; - end - `csr_timeh: begin - csr_output_value = time_counter[63:32]; - end - `csr_instreth: begin - csr_output_value = instret_counter[63:32]; - end - `csr_mvendorid: begin - csr_output_value = mvendorid; - end - `csr_marchid: begin - csr_output_value = marchid; - end - `csr_mimpid: begin - csr_output_value = mimpid; - end - `csr_mhartid: begin - csr_output_value = mhartid; - end `csr_misa: begin csr_output_value = misa; end