From: Dave Airlie <airlied@redhat.com>
Date: Thu, 22 Dec 2016 00:35:46 +0000 (+1000)
Subject: radv: bump texel offsets to align with radeonsi
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=14737bcdd5cc5ebd6694df82917959bc8badce91;p=mesa.git

radv: bump texel offsets to align with radeonsi

it appears from the amdgpu-pro results the hw can do more,
but let's just align with radeonsi for now.

No CTS regressions.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
---

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 7c6dee67318..5f909409161 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -496,10 +496,10 @@ void radv_GetPhysicalDeviceProperties(
 		.minTexelBufferOffsetAlignment            = 1,
 		.minUniformBufferOffsetAlignment          = 4,
 		.minStorageBufferOffsetAlignment          = 4,
-		.minTexelOffset                           = -8,
-		.maxTexelOffset                           = 7,
-		.minTexelGatherOffset                     = -8,
-		.maxTexelGatherOffset                     = 7,
+		.minTexelOffset                           = -32,
+		.maxTexelOffset                           = 31,
+		.minTexelGatherOffset                     = -32,
+		.maxTexelGatherOffset                     = 31,
 		.minInterpolationOffset                   = 0, /* FIXME */
 		.maxInterpolationOffset                   = 0, /* FIXME */
 		.subPixelInterpolationOffsetBits          = 0, /* FIXME */