From: lkcl <lkcl@web>
Date: Sun, 5 Sep 2021 14:54:07 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~227
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=148a2ee56a093cf654b822cfb242d2c371edda47;p=libreriscv.git

---

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index ac3e14b45..3d1b7f014 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -96,7 +96,7 @@ which may be enabled and combined):
   CTR is decremented, including options to decrement if a Condition
   test succeeds *or if it fails*.
 
-With these side-effects, basic Boolean Logic Analysis advises thay
+With these side-effects, basic Boolean Logic Analysis advises that
 it is important to provide a means
 to enact them each based on whether testing succeeds *or fails*. This
 results in a not-insignificant number of additional Mode Augmentation bits,