From: Yvan Roux <yvan.roux@foss.st.com>
Date: Thu, 9 Jun 2022 14:31:40 +0000 (+0200)
Subject: gdb/arm: Terminate unwinding when LR is 0xffffffff
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=148ca9dd5cf96049c0db17c1230e4b96c0ac054a;p=binutils-gdb.git

gdb/arm: Terminate unwinding when LR is 0xffffffff

ARMv7-M Architecture Reference "A2.3.1 Arm core registers" states
that LR is set to 0xffffffff on reset.

ARMv8-M Architecture Reference "B3.3 Registers" states that LR is set
to 0xffffffff on warm reset if Main Extension is implemented,
otherwise the value is unknown.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@st.com>
Signed-off-by: Yvan Roux <yvan.roux@foss.st.com>
---

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 591a2da99f2..09670b69a1d 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -3330,6 +3330,17 @@ arm_m_exception_cache (struct frame_info *this_frame)
   lr = get_frame_register_unsigned (this_frame, ARM_LR_REGNUM);
   sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
 
+  /* ARMv7-M Architecture Reference "A2.3.1 Arm core registers"
+     states that LR is set to 0xffffffff on reset.  ARMv8-M Architecture
+     Reference "B3.3 Registers" states that LR is set to 0xffffffff on warm
+     reset if Main Extension is implemented, otherwise the value is unknown.  */
+  if (lr == 0xffffffff)
+    {
+      /* Terminate any further stack unwinding by referring to self.  */
+      arm_cache_set_active_sp_value (cache, tdep, sp);
+      return cache;
+    }
+
   fnc_return = ((lr & 0xfffffffe) == 0xfefffffe);
   if (tdep->have_sec_ext && fnc_return)
     {