From: Marek Olšák <marek.olsak@amd.com>
Date: Wed, 2 May 2018 23:04:10 +0000 (-0400)
Subject: ac/gpu_info: add has_format_bc1_through_bc7
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=14c5a93bfabdc6543b504a0e7ed658e215b4eedb;p=mesa.git

ac/gpu_info: add has_format_bc1_through_bc7

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
---

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index f05dd77a21e..1c7abdb87cb 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -323,6 +323,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 	info->has_gpu_reset_status_query = true;
 	info->has_gpu_reset_counter_query = false;
 	info->has_eqaa_surface_allocator = true;
+	info->has_format_bc1_through_bc7 = true;
 
 	info->num_render_backends = amdinfo->rb_pipes;
 	/* The value returned by the kernel driver was wrong. */
@@ -477,6 +478,7 @@ void ac_print_gpu_info(struct radeon_info *info)
 	printf("    has_gpu_reset_status_query = %u\n", info->has_gpu_reset_status_query);
 	printf("    has_gpu_reset_counter_query = %u\n", info->has_gpu_reset_counter_query);
 	printf("    has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator);
+	printf("    has_format_bc1_through_bc7 = %u\n", info->has_format_bc1_through_bc7);
 
 	printf("Shader core info:\n");
 	printf("    max_shader_clock = %i\n", info->max_shader_clock);
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index f8e4adf0d41..9c4c6cb11f0 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -103,6 +103,7 @@ struct radeon_info {
 	bool                        has_gpu_reset_status_query;
 	bool                        has_gpu_reset_counter_query;
 	bool                        has_eqaa_surface_allocator;
+	bool                        has_format_bc1_through_bc7;
 
 	/* Shader cores. */
 	uint32_t                    r600_max_quad_pipes; /* wave size / 16 */
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index c7585b285e9..675b1adbe65 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1573,9 +1573,6 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen,
 				       int first_non_void)
 {
 	struct si_screen *sscreen = (struct si_screen*)screen;
-	bool enable_compressed_formats = (sscreen->info.drm_major == 2 &&
-					  sscreen->info.drm_minor >= 31) ||
-					 sscreen->info.drm_major == 3;
 	bool uniform = true;
 	int i;
 
@@ -1630,7 +1627,7 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen,
 	}
 
 	if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
-		if (!enable_compressed_formats)
+		if (!sscreen->info.has_format_bc1_through_bc7)
 			goto out_unknown;
 
 		switch (format) {
@@ -1676,7 +1673,7 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen,
 	}
 
 	if (desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
-		if (!enable_compressed_formats)
+		if (!sscreen->info.has_format_bc1_through_bc7)
 			goto out_unknown;
 
 		switch (format) {
@@ -1705,7 +1702,7 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen,
 	}
 
 	if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
-		if (!enable_compressed_formats)
+		if (!sscreen->info.has_format_bc1_through_bc7)
 			goto out_unknown;
 
 		switch (format) {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 1eecb23d9dd..108c1af9985 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -537,6 +537,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
     ws->info.has_gpu_reset_status_query = false;
     ws->info.has_gpu_reset_counter_query = ws->info.drm_minor >= 43;
     ws->info.has_eqaa_surface_allocator = false;
+    ws->info.has_format_bc1_through_bc7 = ws->info.drm_minor >= 31;
 
     ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL;