From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 5 May 2015 07:22:26 +0000 (-0400)
Subject: mem: Pass shared downstream through caches
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=14e5b2ea552f05e7a83970af09ed255eb26ab134;p=gem5.git

mem: Pass shared downstream through caches

This patch ensures that we pass on information about a packet being
shared (rather than exclusive), when forwarding a packet downstream.

Without this patch there is a risk that a downstream cache considers
the line exclusive when it really isn't.
---

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 5e6eccec8..ca332697b 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -819,6 +819,18 @@ Cache::getBusPacket(PacketPtr cpu_pkt, CacheBlk *blk,
     }
     PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize);
 
+    // if there are sharers in the upper levels, pass that info downstream
+    if (cpu_pkt->sharedAsserted()) {
+        // note that cpu_pkt may have spent a considerable time in the
+        // MSHR queue and that the information could possibly be out
+        // of date, however, there is no harm in conservatively
+        // assuming the block is shared
+        pkt->assertShared();
+        DPRINTF(Cache, "%s passing shared from %s to %s addr %#llx size %d\n",
+                __func__, cpu_pkt->cmdString(), pkt->cmdString(),
+                pkt->getAddr(), pkt->getSize());
+    }
+
     // the packet should be block aligned
     assert(pkt->getAddr() == blockAlign(pkt->getAddr()));