From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 22 Aug 2019 16:09:37 +0000 (+0200)
Subject: Fix missing newline at end of file
X-Git-Tag: working-ls180~1113
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=151db528e44fd12f3c31561df3bb37c12dca48ad;p=yosys.git

Fix missing newline at end of file

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---

diff --git a/techlibs/anlogic/arith_map.v b/techlibs/anlogic/arith_map.v
index d783b0212..1186543da 100644
--- a/techlibs/anlogic/arith_map.v
+++ b/techlibs/anlogic/arith_map.v
@@ -81,4 +81,4 @@ module _80_anlogic_alu (A, B, CI, BI, X, Y, CO);
 
    /* End implementation */
    assign X = AA ^ BB;
-endmodule
\ No newline at end of file
+endmodule