From: whitequark Date: Sat, 1 Jun 2019 16:47:20 +0000 (+0000) Subject: vendor.icestick: implement. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=151e2670b8e08aa19b7647e6d28e604479316954;p=nmigen.git vendor.icestick: implement. --- diff --git a/nmigen/vendor/icestick.py b/nmigen/vendor/icestick.py new file mode 100644 index 0000000..4da44c4 --- /dev/null +++ b/nmigen/vendor/icestick.py @@ -0,0 +1,49 @@ +from ..build import * +from .fpga.lattice_ice40 import LatticeICE40Platform, IceStormProgrammerMixin + + +__all__ = ["ICEStickPlatform"] + + +class ICEStickPlatform(IceStormProgrammerMixin, LatticeICE40Platform): + device = "hx1k" + package = "tq144" + clocks = [ + ("clk12", 12e6), + ] + resources = [ + Resource("clk12", 0, Pins("21", dir="i"), extras=["IO_STANDARD=LVCMOS33"]), + + Resource("user_led", 0, Pins("99", dir="o"), extras=["IO_STANDARD=LVCMOS33"]), + Resource("user_led", 1, Pins("98", dir="o"), extras=["IO_STANDARD=LVCMOS33"]), + Resource("user_led", 2, Pins("97", dir="o"), extras=["IO_STANDARD=LVCMOS33"]), + Resource("user_led", 3, Pins("96", dir="o"), extras=["IO_STANDARD=LVCMOS33"]), + Resource("user_led", 4, Pins("95", dir="o"), extras=["IO_STANDARD=LVCMOS33"]), + + Resource("serial", 0, + Subsignal("rx", Pins("9", dir="i")), + Subsignal("tx", Pins("8", dir="o")), + Subsignal("rts", Pins("7", dir="o")), + Subsignal("cts", Pins("4", dir="i")), + Subsignal("dtr", Pins("3", dir="o")), + Subsignal("dsr", Pins("2", dir="i")), + Subsignal("dcd", Pins("1", dir="i")), + extras=["IO_STANDARD=SB_LVTTL", "PULLUP=1"], + ), + + Resource("irda", 0, + Subsignal("rx", Pins("106", dir="i")), + Subsignal("tx", Pins("105", dir="o")), + Subsignal("sd", Pins("107", dir="o")), + extras=["IO_STANDARD=SB_LVCMOS33"] + ), + + Resource("spiflash", 0, + Subsignal("cs_n", Pins("71", dir="o")), + Subsignal("clk", Pins("70", dir="o")), + Subsignal("mosi", Pins("67", dir="io")), + Subsignal("miso", Pins("68", dir="io")), + extras=["IO_STANDARD=SB_LVCMOS33"] + ), + ] + prog_mode = "flash"