From: Luke Kenneth Casson Leighton Date: Thu, 18 Oct 2018 22:24:25 +0000 (+0100) Subject: csrs X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=15377a42b48948db2241fa621b048c6f5dce0a73;p=riscv-isa-sim.git csrs --- diff --git a/riscv/insns/csrrci.h b/riscv/insns/csrrci.h index 4d83cc0..35ac85f 100644 --- a/riscv/insns/csrrci.h +++ b/riscv/insns/csrrci.h @@ -4,5 +4,5 @@ reg_t old = p->get_csr(csr); if (write) { p->set_csr(csr, old & ~(reg_t)insn.rs1()); } -WRITE_RD(sext_xlen(old)); +WRITE_RD(sext_xlen(sv_reg_t(old))); serialize(); diff --git a/riscv/insns/csrrs.h b/riscv/insns/csrrs.h index 4e8bde9..f3f1166 100644 --- a/riscv/insns/csrrs.h +++ b/riscv/insns/csrrs.h @@ -1,8 +1,8 @@ bool write = insn.rs1() != 0; int csr = validate_csr(insn.csr(), write); -reg_t old = p->get_csr(csr); +sv_reg_t old = sv_reg_t(p->get_csr(csr)); if (write) { - p->set_csr(csr, old | RS1); + p->set_csr(csr, rv_or(old, RS1)); } WRITE_RD(sext_xlen(old)); serialize(); diff --git a/riscv/insns/csrrsi.h b/riscv/insns/csrrsi.h index b673725..a065261 100644 --- a/riscv/insns/csrrsi.h +++ b/riscv/insns/csrrsi.h @@ -4,5 +4,5 @@ reg_t old = p->get_csr(csr); if (write) { p->set_csr(csr, old | insn.rs1()); } -WRITE_RD(sext_xlen(old)); +WRITE_RD(sext_xlen(sv_reg_t(old))); serialize(); diff --git a/riscv/insns/csrrw.h b/riscv/insns/csrrw.h index 7fb87e9..f7876bc 100644 --- a/riscv/insns/csrrw.h +++ b/riscv/insns/csrrw.h @@ -14,5 +14,5 @@ if (csr == CSR_USVVL || csr == CSR_USVMVL) reg_t old = p->get_csr(csr); p->set_csr(csr, RS1); #endif -WRITE_RD(sext_xlen(old)); +WRITE_RD(sext_xlen(sv_reg_t(old))); serialize();