From: Sebastien Bourdeauducq Date: Mon, 11 Nov 2013 15:53:00 +0000 (+0100) Subject: cpuif: add memories to csr.h X-Git-Tag: 24jan2021_ls180~2815 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=15499560b511a1a9ee480509ab839ce60e283ce5;p=litex.git cpuif: add memories to csr.h --- diff --git a/misoclib/cpuif.py b/misoclib/cpuif.py index 5c30289c..0dcdfc16 100644 --- a/misoclib/cpuif.py +++ b/misoclib/cpuif.py @@ -54,6 +54,10 @@ def get_csr_header(csr_base, bank_array, interrupt_map): pass else: r += "#define "+name.upper()+"_INTERRUPT "+str(interrupt_nr)+"\n" + for name, memory, mapaddr, mmap in bank_array.srams: + mem_base = csr_base + 0x800*mapaddr + fullname = name + "_" + memory.name_override + r += "#define "+fullname.upper()+"_BASE "+hex(mem_base)+"\n" r += "\n#endif\n" return r