From: Luke Kenneth Casson Leighton Date: Thu, 29 Dec 2022 21:28:06 +0000 (+0000) Subject: print out memory exception details, on unaligned X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1581a2c935857a28f40764d928136f43da1d4440;p=openpower-isa.git print out memory exception details, on unaligned --- diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index 885510f4..0d93f05e 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -1565,7 +1565,7 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop): except MemException as e: # check for memory errors if e.args[0] == 'unaligned': # alignment error # run a Trap but set DAR first - print("memory unaligned exception, DAR", e.dar) + print("memory unaligned exception, DAR", e.dar, repr(e)) self.spr['DAR'] = SelectableInt(e.dar, 64) self.call_trap(0x600, PIb.PRIV) # 0x600, privileged return diff --git a/src/openpower/decoder/isa/mem.py b/src/openpower/decoder/isa/mem.py index 87453ceb..483f74e4 100644 --- a/src/openpower/decoder/isa/mem.py +++ b/src/openpower/decoder/isa/mem.py @@ -85,7 +85,9 @@ class Mem: remainder = address & (self.bytes_per_word - 1) address = address >> self.word_log2 if remainder & (width - 1) != 0: - exc = MemException("unaligned", "Unaligned access Error") + exc = MemException("unaligned", + "Unaligned access: remainder %x width %d" % \ + (remainder, width)) exc.dar = ldaddr raise exc if address in self.mem: @@ -114,7 +116,9 @@ class Mem: log("Writing 0x%x to ST 0x%x memaddr 0x%x/%x swap %s" % \ (v, staddr, addr, remainder, str(swap))) if remainder & (width - 1) != 0: - exc = MemException("unaligned", "Unaligned access Error") + exc = MemException("unaligned", + "Unaligned access: remainder %x width %d" % \ + (remainder, width)) exc.dar = staddr raise exc if swap: