From: Jason Ekstrand Date: Sat, 12 Nov 2016 18:46:02 +0000 (-0800) Subject: intel/genxml: Make 3DSTATE_WM more consistent across gens X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1587ac1edc8c06fce9962163e56544d638c9b9d2;p=mesa.git intel/genxml: Make 3DSTATE_WM more consistent across gens Reviewed-by: Kristian H. Kristensen Reviewed-by: Timothy Arceri --- diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 4a98371e6f6..5921190e2bd 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -608,7 +608,7 @@ blorp_emit_ps_config(struct blorp_batch *batch, wm.ThreadDispatchEnable = true; if (params->src.enabled) - wm.PixelShaderKillPixel = true; + wm.PixelShaderKillsPixel = true; if (params->dst.surf.samples > 1) { wm.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN; @@ -709,7 +709,7 @@ blorp_emit_ps_config(struct blorp_batch *batch, if (params->src.enabled) { wm.SamplerCount = 1; /* Up to 4 samplers */ - wm.PixelShaderKillPixel = true; /* TODO: temporarily smash on */ + wm.PixelShaderKillsPixel = true; /* TODO: temporarily smash on */ } if (params->dst.surf.samples > 1) { diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml index 60e403a6d34..2d19305b74c 100644 --- a/src/intel/genxml/gen6.xml +++ b/src/intel/genxml/gen6.xml @@ -1464,12 +1464,22 @@ - + - - + + + + + + + + + + + + diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml index 7ac421fed60..9bb863300aa 100644 --- a/src/intel/genxml/gen7.xml +++ b/src/intel/genxml/gen7.xml @@ -1637,7 +1637,12 @@ - + + + + + + @@ -1907,7 +1912,7 @@ - + @@ -1929,7 +1934,12 @@ - + + + + + + diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml index 2e61e7bea07..eb00c15ae62 100644 --- a/src/intel/genxml/gen75.xml +++ b/src/intel/genxml/gen75.xml @@ -1892,7 +1892,12 @@ - + + + + + + @@ -2180,7 +2185,7 @@ - + @@ -2202,7 +2207,12 @@ - + + + + + + diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml index f4dda4e9954..3178b1d83a3 100644 --- a/src/intel/genxml/gen8.xml +++ b/src/intel/genxml/gen8.xml @@ -2310,9 +2310,9 @@ - - - + + + diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml index 58b41f71dd9..3d44cdbc26f 100644 --- a/src/intel/genxml/gen9.xml +++ b/src/intel/genxml/gen9.xml @@ -2535,9 +2535,9 @@ - - - + + + diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 0c8baf6e743..03a29bea931 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c @@ -134,7 +134,7 @@ genX(graphics_pipeline_create)( wm.LineEndCapAntialiasingRegionWidth = 0; /* 0.5 pixels */ wm.LineAntialiasingRegionWidth = 1; /* 1.0 pixels */ wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT; - wm.PixelShaderKillPixel = wm_prog_data->uses_kill; + wm.PixelShaderKillsPixel = wm_prog_data->uses_kill; wm.PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode; wm.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth; wm.PixelShaderUsesSourceW = wm_prog_data->uses_src_w; diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c index 56eb0324b93..e668f949ba7 100644 --- a/src/intel/vulkan/gen8_pipeline.c +++ b/src/intel/vulkan/gen8_pipeline.c @@ -94,15 +94,15 @@ genX(graphics_pipeline_create)( wm.StatisticsEnable = true; wm.LineEndCapAntialiasingRegionWidth = _05pixels; wm.LineAntialiasingRegionWidth = _10pixels; - wm.ForceThreadDispatchEnable = NORMAL; + wm.ForceThreadDispatchEnable = 0 /* Normal */; wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT; if (wm_prog_data && wm_prog_data->early_fragment_tests) { - wm.EarlyDepthStencilControl = PREPS; + wm.EarlyDepthStencilControl = EDSC_PREPS; } else if (wm_prog_data && wm_prog_data->has_side_effects) { - wm.EarlyDepthStencilControl = PSEXEC; + wm.EarlyDepthStencilControl = EDSC_PSEXEC; } else { - wm.EarlyDepthStencilControl = NORMAL; + wm.EarlyDepthStencilControl = EDSC_NORMAL; } wm.BarycentricInterpolationMode =