From: lkcl <lkcl@web>
Date: Thu, 24 Dec 2020 14:50:25 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~952
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1591c018b0db4372224be2a2e8085f096d66d7e7;p=libreriscv.git

---

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 5feadf406..c056c0eac 100644
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -17,7 +17,7 @@ The fundamentals are:
 * Some registers may be "tagged" as Vectors
 * During the loop, "Vector"-tagged register are incremented by
   one with each iteration, executing the *same instruction*
-  but with *different regusters*
+  but with *different registers*
 * Once the loop is completed *only then* is the Program Counter
   allowed to move to the next instruction.