From: Alyssa Rosenzweig Date: Tue, 6 Aug 2019 21:07:10 +0000 (-0700) Subject: pan/midgard: Implement nir_intrinsic_load_num_work_groups X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=15954ab6caa0327702b83d861a88c3c498f6d0f1;p=mesa.git pan/midgard: Implement nir_intrinsic_load_num_work_groups Just a sysval to route through. Signed-off-by: Alyssa Rosenzweig --- diff --git a/src/gallium/drivers/panfrost/pan_compute.c b/src/gallium/drivers/panfrost/pan_compute.c index 78f3a885073..5ca63c15929 100644 --- a/src/gallium/drivers/panfrost/pan_compute.c +++ b/src/gallium/drivers/panfrost/pan_compute.c @@ -87,6 +87,8 @@ panfrost_launch_grid(struct pipe_context *pipe, { struct panfrost_context *ctx = pan_context(pipe); + ctx->compute_grid = info; + struct mali_job_descriptor_header job = { .job_type = JOB_TYPE_COMPUTE, .job_descriptor_size = 1, diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c index 035ce52128b..409c852a228 100644 --- a/src/gallium/drivers/panfrost/pan_context.c +++ b/src/gallium/drivers/panfrost/pan_context.c @@ -749,6 +749,14 @@ static void panfrost_upload_ssbo_sysval( uniform->u[2] = sb.buffer_size; } +static void panfrost_upload_num_work_groups_sysval(struct panfrost_context *ctx, + struct sysval_uniform *uniform) +{ + uniform->u[0] = ctx->compute_grid->grid[0]; + uniform->u[1] = ctx->compute_grid->grid[1]; + uniform->u[2] = ctx->compute_grid->grid[2]; +} + static void panfrost_upload_sysvals(struct panfrost_context *ctx, void *buf, struct panfrost_shader_state *ss, enum pipe_shader_type st) @@ -773,6 +781,10 @@ static void panfrost_upload_sysvals(struct panfrost_context *ctx, void *buf, panfrost_upload_ssbo_sysval(ctx, st, PAN_SYSVAL_ID(sysval), &uniforms[i]); break; + case PAN_SYSVAL_NUM_WORK_GROUPS: + panfrost_upload_num_work_groups_sysval(ctx, &uniforms[i]); + break; + default: assert(0); } diff --git a/src/gallium/drivers/panfrost/pan_context.h b/src/gallium/drivers/panfrost/pan_context.h index 542d24d2c27..1277629382a 100644 --- a/src/gallium/drivers/panfrost/pan_context.h +++ b/src/gallium/drivers/panfrost/pan_context.h @@ -108,6 +108,9 @@ struct panfrost_context { /* panfrost_resource -> panfrost_job */ struct hash_table *write_jobs; + /* Within a launch_grid call.. */ + const struct pipe_grid_info *compute_grid; + /* Bit mask for supported PIPE_DRAW for this hardware */ unsigned draw_modes; diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index ab9ea664cb7..460847e8266 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -330,6 +330,8 @@ midgard_nir_sysval_for_intrinsic(nir_intrinsic_instr *instr) return PAN_SYSVAL_VIEWPORT_SCALE; case nir_intrinsic_load_viewport_offset: return PAN_SYSVAL_VIEWPORT_OFFSET; + case nir_intrinsic_load_num_work_groups: + return PAN_SYSVAL_NUM_WORK_GROUPS; case nir_intrinsic_load_ssbo: case nir_intrinsic_store_ssbo: return midgard_sysval_for_ssbo(instr); @@ -1575,6 +1577,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) case nir_intrinsic_load_viewport_scale: case nir_intrinsic_load_viewport_offset: + case nir_intrinsic_load_num_work_groups: emit_sysval_read(ctx, &instr->instr, -1, 3); break; diff --git a/src/panfrost/midgard/midgard_compile.h b/src/panfrost/midgard/midgard_compile.h index a15d6c0cded..2eb873f39e4 100644 --- a/src/panfrost/midgard/midgard_compile.h +++ b/src/panfrost/midgard/midgard_compile.h @@ -67,6 +67,7 @@ enum { PAN_SYSVAL_VIEWPORT_OFFSET = 2, PAN_SYSVAL_TEXTURE_SIZE = 3, PAN_SYSVAL_SSBO = 4, + PAN_SYSVAL_NUM_WORK_GROUPS = 5, } pan_sysval; #define PAN_TXS_SYSVAL_ID(texidx, dim, is_array) \