From: Megan Wachs Date: Tue, 18 Apr 2017 02:45:42 +0000 (-0700) Subject: debug: Use more unique debug ROM names X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=159a8fe6f82102e183b700dcc46eed00ca22b749;p=riscv-isa-sim.git debug: Use more unique debug ROM names --- diff --git a/debug_rom/Makefile b/debug_rom/Makefile index fa01545..825aed8 100644 --- a/debug_rom/Makefile +++ b/debug_rom/Makefile @@ -9,7 +9,10 @@ COMPILE = $(CC) -nostdlib -nostartfiles -I.. -Tlink.ld ELFS = debug_rom DEPS = debug_rom.S link.ld -all: $(patsubst %,%.h,$(ELFS)) +all: $(patsubst %,%.h,$(ELFS)) $(patsubst %,%_defines.h,$(ELFS)) + +%_defines.h: %.S + grep define $^ > $@ %.h: %.raw xxd -i $^ | sed "s/^unsigned/static const unsigned/" > $@ diff --git a/debug_rom/debug_rom.S b/debug_rom/debug_rom.S index 8f7be00..83108e2 100755 --- a/debug_rom/debug_rom.S +++ b/debug_rom/debug_rom.S @@ -3,17 +3,21 @@ #include "spike/encoding.h" // These are implementation-specific addresses in the Debug Module -#define HALTED 0x100 -#define GOING 0x104 -#define RESUMING 0x108 -#define EXCEPTION 0x10C +#define DEBUG_ROM_HALTED 0x100 +#define DEBUG_ROM_GOING 0x104 +#define DEBUG_ROM_RESUMING 0x108 +#define DEBUG_ROM_EXCEPTION 0x10C // Region of memory where each hart has 1 // byte to read. -#define FLAGS 0x400 -#define FLAG_GO 0 -#define FLAG_RESUME 1 +#define DEBUG_ROM_FLAGS 0x400 +#define DEBUG_ROM_FLAG_GO 0 +#define DEBUG_ROM_FLAG_RESUME 1 +// These needs to match the link.ld +#define DEBUG_ROM_WHERETO 0x300 +#define DEBUG_ROM_ENTRY 0x800 + .option norvc .global entry .global exception @@ -41,30 +45,30 @@ _entry: // us to do, or whether we should resume. entry_loop: csrr s0, CSR_MHARTID - sw s0, HALTED(zero) - lbu s0, FLAGS(s0) // 1 byte flag per hart. Only one hart advances here. - andi s0, s0, (1 << FLAG_GO) + sw s0, DEBUG_ROM_HALTED(zero) + lbu s0, DEBUG_ROM_FLAGS(s0) // 1 byte flag per hart. Only one hart advances here. + andi s0, s0, (1 << DEBUG_ROM_FLAG_GO) bnez s0, going csrr s0, CSR_MHARTID - lbu s0, FLAGS(s0) // multiple harts can resume here - andi s0, s0, (1 << FLAG_RESUME) + lbu s0, DEBUG_ROM_FLAGS(s0) // multiple harts can resume here + andi s0, s0, (1 << DEBUG_ROM_FLAG_RESUME) bnez s0, resume jal zero, entry_loop _exception: - sw zero, EXCEPTION(zero) // Let debug module know you got an exception. + sw zero, DEBUG_ROM_EXCEPTION(zero) // Let debug module know you got an exception. ebreak going: csrr s0, CSR_DSCRATCH // Restore s0 here - sw zero, GOING(zero) // When debug module sees this write, the GO flag is reset. + sw zero, DEBUG_ROM_GOING(zero) // When debug module sees this write, the GO flag is reset. jalr zero, zero, %lo(whereto) // Rocket-Chip has a specific hack which is that jalr in // Debug Mode will flush the I-Cache. We need that so that the // remainder of the variable instructions will be what Debug Module // intends. _resume: csrr s0, CSR_MHARTID - sw s0, RESUMING(zero) // When Debug Module sees this write, the RESUME flag is reset. + sw s0, DEBUG_ROM_RESUMING(zero) // When Debug Module sees this write, the RESUME flag is reset. csrr s0, CSR_DSCRATCH // Restore s0 dret diff --git a/debug_rom/debug_rom_defines.h b/debug_rom/debug_rom_defines.h new file mode 100644 index 0000000..070d26d --- /dev/null +++ b/debug_rom/debug_rom_defines.h @@ -0,0 +1,9 @@ +#define DEBUG_ROM_HALTED 0x100 +#define DEBUG_ROM_GOING 0x104 +#define DEBUG_ROM_RESUMING 0x108 +#define DEBUG_ROM_EXCEPTION 0x10C +#define DEBUG_ROM_FLAGS 0x400 +#define DEBUG_ROM_FLAG_GO 0 +#define DEBUG_ROM_FLAG_RESUME 1 +#define DEBUG_ROM_WHERETO 0x300 +#define DEBUG_ROM_ENTRY 0x800