From: Miodrag Milanovic <mmicko@gmail.com>
Date: Wed, 10 Nov 2021 09:50:44 +0000 (+0100)
Subject: No need to alocate more memory than used
X-Git-Tag: yosys-0.12~36^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=15a35f5584977605e685d2a92126a337a474ae89;p=yosys.git

No need to alocate more memory than used
---

diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index 5a75b52af..47020f105 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -1143,7 +1143,6 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se
 			module->memories[memory->name] = memory;
 
 			int number_of_bits = net->Size();
-			number_of_bits = 1 << ceil_log2(number_of_bits);
 			int bits_in_word = number_of_bits;
 			FOREACH_PORTREF_OF_NET(net, si, pr) {
 				if (pr->GetInst()->Type() == OPER_READ_PORT) {