From: Steve Reinhardt Date: Sat, 14 Jul 2007 20:28:52 +0000 (-0700) Subject: Add CacheRepl trace flag and move a couple DPRINTFs to it. X-Git-Tag: m5_2.0_beta4~195^2~50^2~6 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=15a51d0cae01defc116c9a937bfa8c4577f72826;p=gem5.git Add CacheRepl trace flag and move a couple DPRINTFs to it. --HG-- extra : convert_revision : 31724d19ebdf2cdc2a2bafff83d17845b3a0b183 --- diff --git a/src/base/traceflags.py b/src/base/traceflags.py index 70fadb210..8573eb9bf 100644 --- a/src/base/traceflags.py +++ b/src/base/traceflags.py @@ -47,6 +47,7 @@ baseFlags = [ 'BusBridge', 'Cache', 'CachePort', + 'CacheRepl', 'Chains', 'Checker', 'Clock', diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc index 3269aa4db..0a8587c20 100644 --- a/src/mem/cache/tags/lru.cc +++ b/src/mem/cache/tags/lru.cc @@ -173,7 +173,7 @@ LRU::findBlock(Addr addr, int &lat) if (blk != NULL) { // move this block to head of the MRU list sets[set].moveToHead(blk); - DPRINTF(Cache, "set %x: moving blk %x to MRU\n", + DPRINTF(CacheRepl, "set %x: moving blk %x to MRU\n", set, regenerateBlkAddr(tag, set)); if (blk->whenReady > curTick && blk->whenReady - curTick > hitLatency) { @@ -208,7 +208,7 @@ LRU::findReplacement(Addr addr, PacketList &writebacks) ++sampledRefs; blk->refCount = 0; - DPRINTF(Cache, "set %x: selecting blk %x for replacement\n", + DPRINTF(CacheRepl, "set %x: selecting blk %x for replacement\n", set, regenerateBlkAddr(blk->tag, set)); } else if (!blk->isTouched) { tagsInUse++;