From: lkcl <lkcl@web>
Date: Sat, 28 Aug 2021 16:09:05 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~286
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=15b3a177f3ff6ea32287324509e7a891caf5f300;p=libreriscv.git

---

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index e1177b25e..1eee04bfb 100644
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -441,9 +441,20 @@ ffirst LD/ST operations on an aligned boundary.  Likewise, to reduce
 workloads or balance resources.
 
 CR-based data-dependent first on the other hand MUST not truncate VL
-arbitrarily.  This because it is a precise test on which algorithms
+arbitrarily to a length decided by the hardware: VL MUST only be
+truncated based explicitly on whether a test fails.
+This because it is a precise test on which algorithms
 will rely.
 
+## Data-dependent fail-first on CR operations (crand etc)
+
+Operations that actually produce or alter CR Field as a result
+do not also in turn have an Rc=1 mode.  However it makes no
+sense to try to test the 4 bits of a CR Field for being equal
+or not equal to zero.
+
+TODO
+
 # pred-result mode
 
 This mode merges common CR testing with predication, saving on instruction