From: Luke Kenneth Casson Leighton Date: Thu, 1 Jun 2023 15:31:39 +0000 (+0100) Subject: add Common Frequent Rare to ls012 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=15d2cdb76d32db0e53b961dd1607ba6a1bfbec96;p=libreriscv.git add Common Frequent Rare to ls012 --- diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn index 77db7d476..4282384f1 100644 --- a/openpower/sv/rfc/ls012.mdwn +++ b/openpower/sv/rfc/ls012.mdwn @@ -515,6 +515,19 @@ Sounds like an obvious question but if there is no driving need (no purely out of curiosity or part of a Research effort not intended for production then it's probably best left in the EXT022 Sandbox. +**Common, Frequent, Rare** + +Even to the point of asking the same question about a register file, +not just about an instruction, is the instruction (or other feature) +intended to be: + +* Common (used all of the time, typically built-in to toolchain) +* Frequent (specialised tasks but time or resource critical) +* Rare (when you need them you need them) + +A good example would be the addition of 128-bit operations, or even +(for Elliptic Curve Cryptography - ec25519) 512-bit ALUs. + **How many registers does it need?** The basic RISC Paradigm is not only to make instruction encoding simple