From: yimmanuel3@f4ac60d763911c3fa518755176e4b9ed455c75d8 Date: Sun, 2 Feb 2020 09:18:26 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~3606 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1605122046eda39570bf2699fc49a49c2c0747a7;p=libreriscv.git --- diff --git a/index.mdwn b/index.mdwn index 75d2ee500..11ed87bbd 100644 --- a/index.mdwn +++ b/index.mdwn @@ -14,12 +14,10 @@ Given the fact that performant bug-free processors no longer exist, how can you Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc. -## But Why do I need a LibreSOC? -Its entirely possible that you're OK with the fact that modern processors have -[backdoors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html) that bad actors -regularly exploit. +## Benefits: Privacy, Safety-Critical, Peace of Mind... +Our LibreSOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html). -But beyond the contemporary ever increasing cry for privacy, is a very real need for reliable safety critical processors(think airplane, smart car, pacemaker...). +There is a very real need for reliable safety critical processors(think airplane, smart car, pacemaker...). LibreSOC poses to you that it is impossible to trust a processor in a safety critical environment without both access to that processor's source and a cycle accurate HDL simulator that guarantees developers their code behaves as they expect. An ISA level simulator is no longer satisfactory.