From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Tue, 11 Apr 2017 14:24:54 +0000 (+0100)
Subject: i965: Pass the EGL/DRI context priority through to the kernel
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1617fca6d12e418e02d18733dd0d1964c7ecbda9;p=mesa.git

i965: Pass the EGL/DRI context priority through to the kernel

Decode the EGL/DRI priority enum into the [-1023, 1023] range as
interpreted by the kernel and call DRM_I915_GEM_CONTEXT_SETPARAM to
adjust the priority. We use 0 as the default medium priority (also the
kernel default) and so only need adjust up or down. By only doing the
adjustment if not setting to medium, we can faithfully report any error
whilst setting without worrying about kernel version.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 7c5a9651eba..17036b53bcd 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -1299,6 +1299,25 @@ brw_create_hw_context(struct brw_bufmgr *bufmgr)
    return create.ctx_id;
 }
 
+int
+brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
+                            uint32_t ctx_id,
+                            int priority)
+{
+   struct drm_i915_gem_context_param p = {
+      .ctx_id = ctx_id,
+      .param = I915_CONTEXT_PARAM_PRIORITY,
+      .value = priority,
+   };
+   int err;
+
+   err = 0;
+   if (drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM, &p))
+      err = -errno;
+
+   return err;
+}
+
 void
 brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id)
 {
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h b/src/mesa/drivers/dri/i965/brw_bufmgr.h
index de0ba1dad14..ee913240432 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.h
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h
@@ -322,6 +322,15 @@ void brw_bufmgr_enable_reuse(struct brw_bufmgr *bufmgr);
 int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
 
 uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
+
+#define BRW_CONTEXT_LOW_PRIORITY ((I915_CONTEXT_MIN_USER_PRIORITY-1)/2)
+#define BRW_CONTEXT_MEDIUM_PRIORITY (I915_CONTEXT_DEFAULT_PRIORITY)
+#define BRW_CONTEXT_HIGH_PRIORITY ((I915_CONTEXT_MAX_USER_PRIORITY+1)/2)
+
+int brw_hw_context_set_priority(struct brw_bufmgr *bufmgr,
+                                uint32_t ctx_id,
+                                int priority);
+
 void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
 
 int brw_bo_gem_export_to_prime(struct brw_bo *bo, int *prime_fd);
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index a86367cc46b..c8de0746387 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -956,6 +956,24 @@ brwCreateContext(gl_api api,
          intelDestroyContext(driContextPriv);
          return false;
       }
+
+      int hw_priority = BRW_CONTEXT_MEDIUM_PRIORITY;
+      switch (priority) {
+      case __DRI_CTX_PRIORITY_LOW:
+         hw_priority = BRW_CONTEXT_LOW_PRIORITY;
+         break;
+      case __DRI_CTX_PRIORITY_HIGH:
+         hw_priority = BRW_CONTEXT_HIGH_PRIORITY;
+         break;
+      }
+      if (hw_priority != I915_CONTEXT_DEFAULT_PRIORITY &&
+          brw_hw_context_set_priority(brw->bufmgr, brw->hw_ctx, hw_priority)) {
+         fprintf(stderr,
+		 "Failed to set priority [%d:%d] for hardware context.\n",
+                 priority, hw_priority);
+         intelDestroyContext(driContextPriv);
+         return false;
+      }
    }
 
    if (brw_init_pipe_control(brw, devinfo)) {