From: Alyssa Rosenzweig Date: Fri, 24 Apr 2020 21:20:15 +0000 (-0400) Subject: pan/bi: Fix ADD.v4i8 opcode X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1622478fbdc885d05d43702c14b8d0b4a0e39fe3;p=mesa.git pan/bi: Fix ADD.v4i8 opcode Signed-off-by: Alyssa Rosenzweig Part-of: --- diff --git a/src/panfrost/bifrost/disassemble.c b/src/panfrost/bifrost/disassemble.c index 41e4ae0e287..6c68877f1e9 100644 --- a/src/panfrost/bifrost/disassemble.c +++ b/src/panfrost/bifrost/disassemble.c @@ -554,6 +554,8 @@ static const struct fma_op_info FMAOpInfos[] = { { true, 0x01e10, "SEL.XY.i16", FMA_TWO_SRC }, { true, 0x01e18, "SEL.YY.i16", FMA_TWO_SRC }, { true, 0x01e80, "ADD_FREXPM.f32", FMA_TWO_SRC }, + { true, 0x02000, "SWZ.XXXX.v4i8", FMA_ONE_SRC }, + { true, 0x03e00, "SWZ.ZZZZ.v4i8", FMA_ONE_SRC }, { true, 0x00800, "IMAD", FMA_THREE_SRC }, { true, 0x078db, "POPCNT", FMA_ONE_SRC }, }; @@ -1081,6 +1083,7 @@ static const struct add_op_info add_op_infos[] = { { 0x12000, "MIN.v2f16", ADD_FMINMAX16 }, { 0x14000, "ADD.v2f16", ADD_FADD16 }, { 0x17000, "FCMP.D3D", ADD_FCMP16 }, + { 0x17880, "ADD.v4i8", ADD_TWO_SRC }, { 0x178c0, "ADD.i32", ADD_TWO_SRC }, { 0x17900, "ADD.v2i16", ADD_TWO_SRC }, { 0x17ac0, "SUB.i32", ADD_TWO_SRC }, @@ -1089,7 +1092,6 @@ static const struct add_op_info add_op_infos[] = { { 0x17d90, "ADD.i32.u16.X", ADD_TWO_SRC }, { 0x17dc0, "ADD.i32.i16.Y", ADD_TWO_SRC }, { 0x17dd0, "ADD.i32.u16.Y", ADD_TWO_SRC }, - { 0x17881, "ADD.i8", ADD_TWO_SRC }, { 0x18000, "LD_VAR_ADDR", ADD_VARYING_ADDRESS, true }, { 0x19181, "DISCARD.FEQ.f32", ADD_TWO_SRC, true }, { 0x19189, "DISCARD.FNE.f32", ADD_TWO_SRC, true },