From: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Wed, 13 Mar 2019 22:27:39 +0000 (-0500)
Subject: anv: Only set 3DSTATE_PS::VectorMaskEnable on gen8+
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=162286eb7529d469f64b83e11ff896ac3549add6;p=mesa.git

anv: Only set 3DSTATE_PS::VectorMaskEnable on gen8+

We don't set it on HSW and earlier in i965 and disabling it appears to
make derivatives somewhat more reliable.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 975052deb79..3767e5033c5 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1761,7 +1761,7 @@ emit_3dstate_ps(struct anv_pipeline *pipeline,
                                brw_wm_prog_data_prog_offset(wm_prog_data, ps, 2);
 
       ps.SingleProgramFlow          = false;
-      ps.VectorMaskEnable           = true;
+      ps.VectorMaskEnable           = GEN_GEN >= 8;
       /* WA_1606682166 */
       ps.SamplerCount               = GEN_GEN == 11 ? 0 : get_sampler_count(fs_bin);
       /* Gen 11 workarounds table #2056 WABTPPrefetchDisable */