From: lkcl <lkcl@web>
Date: Sun, 28 Nov 2021 23:47:02 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3335
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=164fc69e002e204d8d6661d51d94182aa3eef860;p=libreriscv.git

---

diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn
index f72dd3c98..455f4a19c 100644
--- a/docs/pinmux.mdwn
+++ b/docs/pinmux.mdwn
@@ -302,6 +302,23 @@ is then taken care of **automatically and transparently**, but to
 all intents and purposes looking exactly like a Platform even to
 the extent of taking the exact same list of Resources.
 
+    class Blinker(Elaboratable):
+      def __init__(self, resources):
+          self.jtag = JTAG(resources)
+
+      def elaborate(self, platform):
+          m = Module()
+          m.submodules.jtag = jtag = self.jtag
+
+          # get the UART resource, mess with the output tx
+          uart = jtag.request('uart')
+          intermediary = Signal()
+          m.d.comb += uart.tx.eq(~intermediary) # invert, for fun
+          m.d.comb += intermediary.eq(uart.rx) # pass rx to tx
+
+          return jtag.boundary_elaborate(m, platform)
+
+
 ## Clock synchronisation
 
 Take for example USB ULPI: