From: Aldy Hernandez <aldyh@redhat.com>
Date: Mon, 20 May 2002 02:31:24 +0000 (+0000)
Subject: rs6000.h (FUNCTION_VALUE): Only return vectors in an altivec register if TARGET_ALTIVEC.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=16861f33d261b486cf6713c4da46bc35b6d2058b;p=gcc.git

rs6000.h (FUNCTION_VALUE): Only return vectors in an altivec register if TARGET_ALTIVEC.

2002-05-19  Aldy Hernandez  <aldyh@redhat.com>

        * config/rs6000/rs6000.h (FUNCTION_VALUE): Only return vectors in
        an altivec register if TARGET_ALTIVEC.

        * config/rs600/rs6000.c (rs6000_emit_move): Change VECTOR_MODE_P
        to ALTIVEC_VECTOR_MODE.
        (rs6000_va_arg): Only vectors of type AltiVec are 16 byte aligned.
        (rs6000_va_arg): Vectors may go in registers if they are not
        altivec vectors.

From-SVN: r53645
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1ec26fe03ce..bf0d2b7da14 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2002-05-19  Aldy Hernandez  <aldyh@redhat.com>
+
+        * config/rs6000/rs6000.h (FUNCTION_VALUE): Only return vectors in
+        an altivec register if TARGET_ALTIVEC.
+
+        * config/rs600/rs6000.c (rs6000_emit_move): Change VECTOR_MODE_P
+        to ALTIVEC_VECTOR_MODE.
+        (rs6000_va_arg): Only vectors of type AltiVec are 16 byte aligned.
+        (rs6000_va_arg): Vectors may go in registers if they are not
+        altivec vectors.
+
 2002-05-19  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* protoize.c: Fix formatting.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 1a65a772271..071e400188a 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -2315,7 +2315,7 @@ rs6000_emit_move (dest, source, mode)
 
   /* Handle the case where reload calls us with an invalid address;
      and the case of CONSTANT_P_RTX.  */
-  if (!VECTOR_MODE_P (mode)
+  if (!ALTIVEC_VECTOR_MODE (mode)
       && (! general_operand (operands[1], mode)
 	  || ! nonimmediate_operand (operands[0], mode)
 	  || GET_CODE (operands[1]) == CONSTANT_P_RTX))
@@ -3225,8 +3225,8 @@ rs6000_va_arg (valist, type)
   lab_over = gen_label_rtx ();
   addr_rtx = gen_reg_rtx (Pmode);
 
-  /*  Vectors never go in registers.  */
-  if (TREE_CODE (type) != VECTOR_TYPE)
+  /*  AltiVec vectors never go in registers.  */
+  if (!TARGET_ALTIVEC || TREE_CODE (type) != VECTOR_TYPE)
     {
       TREE_THIS_VOLATILE (reg) = 1;
       emit_cmp_and_jump_insns
@@ -3280,7 +3280,8 @@ rs6000_va_arg (valist, type)
      All AltiVec vectors go in the overflow area.  So in the AltiVec
      case we need to get the vectors from the overflow area, but
      remember where the GPRs and FPRs are.  */
-  if (n_reg > 1 && TREE_CODE (type) != VECTOR_TYPE)
+  if (n_reg > 1 && (TREE_CODE (type) != VECTOR_TYPE
+		    || !TARGET_ALTIVEC))
     {
       t = build (MODIFY_EXPR, TREE_TYPE (reg), reg, build_int_2 (8, 0));
       TREE_SIDE_EFFECTS (t) = 1;
@@ -3294,8 +3295,8 @@ rs6000_va_arg (valist, type)
     {
       int align;
 
-      /* Vectors are 16 byte aligned.  */
-      if (TREE_CODE (type) == VECTOR_TYPE)
+      /* AltiVec vectors are 16 byte aligned.  */
+      if (TARGET_ALTIVEC && TREE_CODE (type) == VECTOR_TYPE)
 	align = 15;
       else
 	align = 7;
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index fa47a97cd03..4e9edffe82a 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -1460,7 +1460,8 @@ typedef struct rs6000_stack {
 		&& TYPE_PRECISION (VALTYPE) < BITS_PER_WORD)	\
 	       || POINTER_TYPE_P (VALTYPE)			\
 	       ? word_mode : TYPE_MODE (VALTYPE),		\
-	       TREE_CODE (VALTYPE) == VECTOR_TYPE ? ALTIVEC_ARG_RETURN \
+	       TREE_CODE (VALTYPE) == VECTOR_TYPE		\
+	       && TARGET_ALTIVEC ? ALTIVEC_ARG_RETURN		\
 	       : TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT \
                ? FP_ARG_RETURN : GP_ARG_RETURN)