From: Vladimir Makarov Date: Fri, 16 Feb 2018 18:17:09 +0000 (+0000) Subject: re PR rtl-optimization/70023 (ICE: in assign_by_spills, at lra-assigns.c:1417/8 with... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=16ba97b9eb8b1db41b9aa1fdaae764653698cf26;p=gcc.git re PR rtl-optimization/70023 (ICE: in assign_by_spills, at lra-assigns.c:1417/8 with -fschedule-insns) 2018-02-16 Vladimir Makarov PR rtl-optimization/70023 * lra-constraints.c (inherit_in_ebb): Take hard reg mode of src_regno into account. 2018-02-16 Vladimir Makarov PR rtl-optimization/70023 * gcc.target/i386/pr70023.c: New. From-SVN: r257751 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 78ea3af2f3b..4a1a36fd4a4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-02-16 Vladimir Makarov + + PR rtl-optimization/70023 + * lra-constraints.c (inherit_in_ebb): Take hard reg mode of + src_regno into account. + 2018-02-16 Carl Love * config/rs6000/altivec.h: Remove vec_vextract4b and vec_vinsert4b. diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 9d22da232f4..d730f36fba0 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -6346,7 +6346,13 @@ inherit_in_ebb (rtx_insn *head, rtx_insn *tail) PSEUDO_REGNO_MODE (src_regno), reg_renumber[src_regno]); } - add_next_usage_insn (src_regno, use_insn, reloads_num); + if (src_regno >= FIRST_PSEUDO_REGISTER) + add_next_usage_insn (src_regno, use_insn, reloads_num); + else + { + for (i = 0; i < hard_regno_nregs (src_regno, reg->biggest_mode); i++) + add_next_usage_insn (src_regno + i, use_insn, reloads_num); + } } } /* Process used call regs. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b77afed11b7..e5aebb10baf 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-02-16 Vladimir Makarov + + PR rtl-optimization/70023 + * gcc.target/i386/pr70023.c: New. + 2018-02-16 Carl Love * gcc.target/powerpc/p9-vinsert4b-1.c: Remove test file for non-ABI diff --git a/gcc/testsuite/gcc.target/i386/pr70023.c b/gcc/testsuite/gcc.target/i386/pr70023.c new file mode 100644 index 00000000000..57660e2b011 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr70023.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O -fno-sched-critical-path-heuristic -fschedule-insns -m8bit-idiv -w" } */ + +typedef int v8si __attribute__ ((vector_size (32))); +typedef __int128 i128; + +i128 +foo(int u16_0, int u64_0, i128 u128_0, i128 u128_1, v8si v32u32_0, v8si v32u32_1, v8si v32u64_1) +{ + v32u32_0[6] <<= u128_1 & 31; + v32u32_0 &= (v8si){v32u64_1[2], v32u32_1[6], 0xc5a661b, 0, 2}; + u128_1 += 0x16fe7853d732; + v32u32_1 /= (v8si){v32u32_0[5], u128_1, 0x92d} | 1; + return u128_0 + v32u32_1[1]; +}