From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 26 Sep 2023 10:55:08 +0000 (+0100)
Subject: Added english language description, spaces and brackets for ldx instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=16fedd39e02795e21dce829a31d62909728d6c75;p=openpower-isa.git

Added english language description, spaces and brackets for ldx instruction
---

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index e46633fc..a87d6332 100644
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -520,6 +520,12 @@ Pseudo-code:
     EA <- b + (RB)
     RT <- MEM(EA, 8)
 
+Description:
+
+    Let the effective address (EA) be the sum
+    (RA|0)+ (RB). The doubleword in storage addressed by
+    EA is loaded into RT.
+
 Special Registers Altered:
 
     None