From: Marek Olšák Date: Tue, 23 Jul 2019 04:32:06 +0000 (-0400) Subject: radeonsi: adjust RB+ blend optimization settings X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=17021efc7421495ad189b82a26dd651c9a98ccb4;p=mesa.git radeonsi: adjust RB+ blend optimization settings based on PAL --- diff --git a/src/amd/registers/amdgfxregs.json b/src/amd/registers/amdgfxregs.json index 23643c3dc7b..a218232d85b 100644 --- a/src/amd/registers/amdgfxregs.json +++ b/src/amd/registers/amdgfxregs.json @@ -1000,7 +1000,7 @@ {"name": "EXACT", "value": 0}, {"name": "11BIT_FORMAT", "value": 1}, {"name": "10BIT_FORMAT", "value": 3}, - {"name": "8BIT_FORMAT", "value": 7}, + {"name": "8BIT_FORMAT", "value": 6}, {"name": "6BIT_FORMAT", "value": 11}, {"name": "5BIT_FORMAT", "value": 13}, {"name": "4BIT_FORMAT", "value": 15} diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 827d6b31db2..be1e88a35b2 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -250,10 +250,8 @@ static void si_emit_cb_render_state(struct si_context *sctx) break; case V_028C70_COLOR_10_11_11: - if (spi_format == V_028714_SPI_SHADER_FP16_ABGR) { + if (spi_format == V_028714_SPI_SHADER_FP16_ABGR) sx_ps_downconvert |= V_028754_SX_RT_EXPORT_10_11_11 << (i * 4); - sx_blend_opt_epsilon |= V_028758_11BIT_FORMAT << (i * 4); - } break; case V_028C70_COLOR_2_10_10_10: