From: Florent Kermarrec Date: Mon, 9 Feb 2015 13:49:59 +0000 (+0100) Subject: improve RX timings (make valid synchronous) X-Git-Tag: 24jan2021_ls180~2604^2~59 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=175457473135a0642c0b14a1592f444b52da9146;p=litex.git improve RX timings (make valid synchronous) --- diff --git a/liteeth/common.py b/liteeth/common.py index b94ce217..1cec3e4e 100644 --- a/liteeth/common.py +++ b/liteeth/common.py @@ -7,8 +7,8 @@ from migen.genlib.resetsync import AsyncResetSynchronizer from migen.genlib.record import * from migen.genlib.fsm import FSM, NextState from migen.genlib.misc import chooser -from migen.flow.actor import EndpointDescription -from migen.flow.actor import Sink, Source +from migen.flow.actor import * +from migen.flow.plumbing import Buffer from migen.actorlib.structuring import Converter, Pipeline from migen.actorlib.fifo import SyncFIFO, AsyncFIFO from migen.bank.description import * diff --git a/liteeth/core/arp/__init__.py b/liteeth/core/arp/__init__.py index ff2b2ac6..fbc31da0 100644 --- a/liteeth/core/arp/__init__.py +++ b/liteeth/core/arp/__init__.py @@ -96,7 +96,7 @@ class LiteEthARPRX(Module): ) ) valid = Signal() - self.comb += valid.eq( + self.sync += valid.eq( depacketizer.source.stb & (depacketizer.source.hwtype == arp_hwtype_ethernet) & (depacketizer.source.proto == arp_proto_ip) & diff --git a/liteeth/core/icmp/__init__.py b/liteeth/core/icmp/__init__.py index 5af0f4b4..d2e0abe4 100644 --- a/liteeth/core/icmp/__init__.py +++ b/liteeth/core/icmp/__init__.py @@ -71,7 +71,7 @@ class LiteEthICMPRX(Module): ) ) valid = Signal() - self.comb += valid.eq( + self.sync += valid.eq( depacketizer.source.stb & (sink.protocol == icmp_protocol) ) diff --git a/liteeth/core/ip/__init__.py b/liteeth/core/ip/__init__.py index 09955966..47cd1359 100644 --- a/liteeth/core/ip/__init__.py +++ b/liteeth/core/ip/__init__.py @@ -136,7 +136,7 @@ class LiteEthIPRX(Module): ) ) valid = Signal() - self.comb += valid.eq( + self.sync += valid.eq( depacketizer.source.stb & (depacketizer.source.target_ip == ip_address) & (depacketizer.source.version == 0x4) & diff --git a/liteeth/core/udp/__init__.py b/liteeth/core/udp/__init__.py index f4df2e5e..7a8ae5f0 100644 --- a/liteeth/core/udp/__init__.py +++ b/liteeth/core/udp/__init__.py @@ -72,7 +72,7 @@ class LiteEthUDPRX(Module): ) ) valid = Signal() - self.comb += valid.eq( + self.sync += valid.eq( depacketizer.source.stb & (sink.protocol == udp_protocol) )