From: Jason Ekstrand Date: Thu, 8 Sep 2016 21:08:02 +0000 (-0700) Subject: i965/fs: Fail the shader compile instead of asserting when we can't spill X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=175ac629be1396fb8566836e32961a22fc5cca21;p=mesa.git i965/fs: Fail the shader compile instead of asserting when we can't spill Blorp doesn't handle spilling so we set allow_spilling to false in that case. The blorp 16x MSAA resolve shader spills in 16-wide but not 8-wide. This commit makes it so that we fail the 16-wide compile and successfully fall back to 8-wide instead of just assert-failing when trying to compile the 16-wide shader. Signed-off-by: Jason Ekstrand Reviewed-by: Francisco Jerez --- diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index d0b55aeb513..75642d3f1e1 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -5906,6 +5906,9 @@ fs_visitor::allocate_registers(bool allow_spilling) } if (!allocated_without_spills) { + if (!allow_spilling) + fail("Failure to register allocate and spilling is not allowed."); + /* We assume that any spilling is worse than just dropping back to * SIMD8. There's probably actually some intermediate point where * SIMD16 with a couple of spills is still better. @@ -5930,8 +5933,6 @@ fs_visitor::allocate_registers(bool allow_spilling) } } - assert(last_scratch == 0 || allow_spilling); - /* This must come after all optimization and register allocation, since * it inserts dead code that happens to have side effects, and it does * so based on the actual physical registers in use.