From: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Wed, 5 Jun 2013 17:02:31 +0000 (+0000)
Subject: arm.md (enabled_for_depr_it): New attribute.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=17a7fc37d4cc1d5c6d51c9c59de0b193e9462b48;p=gcc.git

arm.md (enabled_for_depr_it): New attribute.

2013-06-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm.md (enabled_for_depr_it): New attribute.
	(predicable_short_it): Likewise.
	(predicated): Likewise.
	(enabled): Handle above.
	(define_cond_exec): Set predicated attribute to yes.

From-SVN: r199705
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bc7f98e5888..7932819966f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2013-06-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/arm/arm.md (enabled_for_depr_it): New attribute.
+	(predicable_short_it): Likewise.
+	(predicated): Likewise.
+	(enabled): Handle above.
+	(define_cond_exec): Set predicated attribute to yes.
+
 2013-06-05  Mike Stump  <mikestump@comcast.net>
 
 	* gdbinit.in (__FUNCTION__): Add.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 466baa8454a..5370efab8d7 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -93,6 +93,15 @@
 ; IS_THUMB1 is set to 'yes' iff we are generating Thumb-1 code.
 (define_attr "is_thumb1" "no,yes" (const (symbol_ref "thumb1_code")))
 
+; We use this attribute to disable alternatives that can produce 32-bit
+; instructions inside an IT-block in Thumb2 state.  ARMv8 deprecates IT blocks
+; that contain 32-bit instructions.
+(define_attr "enabled_for_depr_it" "no,yes" (const_string "yes"))
+
+; This attribute is used to disable a predicated alternative when we have
+; arm_restrict_it.
+(define_attr "predicable_short_it" "no,yes" (const_string "yes"))
+
 ;; Operand number of an input operand that is shifted.  Zero if the
 ;; given instruction does not shift one of its input operands.
 (define_attr "shift" "" (const_int 0))
@@ -103,6 +112,8 @@
 (define_attr "fpu" "none,vfp"
   (const (symbol_ref "arm_fpu_attr")))
 
+(define_attr "predicated" "yes,no" (const_string "no"))
+
 ; LENGTH of an instruction (in bytes)
 (define_attr "length" ""
   (const_int 4))
@@ -190,6 +201,15 @@
    (cond [(eq_attr "insn_enabled" "no")
 	  (const_string "no")
 
+	  (and (eq_attr "predicable_short_it" "no")
+	       (and (eq_attr "predicated" "yes")
+	            (match_test "arm_restrict_it")))
+	  (const_string "no")
+
+	  (and (eq_attr "enabled_for_depr_it" "no")
+	       (match_test "arm_restrict_it"))
+	  (const_string "no")
+
 	  (eq_attr "arch_enabled" "no")
 	  (const_string "no")
 
@@ -12130,6 +12150,7 @@
      (const_int 0)])]
   "TARGET_32BIT"
   ""
+[(set_attr "predicated" "yes")]
 )
 
 (define_insn "force_register_use"