From: Chris Forbes Date: Sun, 3 Aug 2014 00:02:25 +0000 (+1200) Subject: i965: Adjust set_message_descriptor to handle non-sends X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=17e0fa9a066967ee7765d857e3a91f3a6bd4e566;p=mesa.git i965: Adjust set_message_descriptor to handle non-sends We're about to be using this infrastructure to build descriptors in src1 of non-send instructions, when preparing to do an indirect send. Don't accidentally clobber the conditionalmod field of those instructions with SFID bits, which aren't part of the descriptor. Signed-off-by: Chris Forbes --- diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index c2a40832998..c18ac3a305a 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -540,7 +540,19 @@ brw_set_message_descriptor(struct brw_compile *p, struct brw_context *brw = p->brw; brw_set_src1(p, inst, brw_imm_d(0)); - brw_inst_set_sfid(brw, inst, sfid); + + /* For indirect sends, `inst` will not be the SEND/SENDC instruction + * itself; instead, it will be a MOV/OR into the address register. + * + * In this case, we avoid setting the extended message descriptor bits, + * since they go on the later SEND/SENDC instead and if set here would + * instead clobber the conditionalmod bits. + */ + unsigned opcode = brw_inst_opcode(brw, inst); + if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) { + brw_inst_set_sfid(brw, inst, sfid); + } + brw_inst_set_mlen(brw, inst, msg_length); brw_inst_set_rlen(brw, inst, response_length); brw_inst_set_eot(brw, inst, end_of_thread);