From: Luke Kenneth Casson Leighton Date: Tue, 7 Jul 2020 14:50:30 +0000 (+0100) Subject: update opcode map for OP_ATTN X-Git-Tag: div_pipeline~162^2~9 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=180f18f1087e00a071fa29f080fb530d53f76991;p=soc.git update opcode map for OP_ATTN --- diff --git a/libreriscv b/libreriscv index 1bfe6d5b..09d89525 160000 --- a/libreriscv +++ b/libreriscv @@ -1 +1 @@ -Subproject commit 1bfe6d5bd723b78bd694a1f0955f1982f453196d +Subproject commit 09d89525805d989982838a01193ab0bdc54fb662 diff --git a/src/soc/simple/test/test_issuer.py b/src/soc/simple/test/test_issuer.py index fd068a65..8b80613b 100644 --- a/src/soc/simple/test/test_issuer.py +++ b/src/soc/simple/test/test_issuer.py @@ -172,7 +172,7 @@ if __name__ == "__main__": #suite.addTest(TestRunner(CRTestCase.test_data)) #suite.addTest(TestRunner(ShiftRotTestCase.test_data)) #suite.addTest(TestRunner(LogicalTestCase.test_data)) - suite.addTest(TestRunner(ALUTestCase.test_data)) + #suite.addTest(TestRunner(ALUTestCase.test_data)) #suite.addTest(TestRunner(BranchTestCase.test_data)) #suite.addTest(TestRunner(SPRTestCase.test_data))