From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Sat, 31 Mar 2012 16:11:29 +0000 (+0200)
Subject: tb/asmicon: bankmachine test bench
X-Git-Tag: 24jan2021_ls180~3202
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=185bd66ee4b439e3c92a2bda3791cce972766cdc;p=litex.git

tb/asmicon: bankmachine test bench
---

diff --git a/tb/asmicon/bankmachine.py b/tb/asmicon/bankmachine.py
new file mode 100644
index 00000000..37ef3112
--- /dev/null
+++ b/tb/asmicon/bankmachine.py
@@ -0,0 +1,48 @@
+from migen.fhdl.structure import *
+from migen.bus.asmibus import *
+from migen.sim.generic import Simulator, TopLevel
+from migen.sim.icarus import Runner
+
+from milkymist.asmicon.bankmachine import *
+
+from common import sdram_geom, sdram_timing, CommandLogger
+
+def my_generator():
+	for x in range(10):
+		t = TWrite(x)
+		yield t
+	for x in range(10):
+		t = TWrite(x + 2200)
+		yield t
+
+class Completer:
+	def __init__(self, hub, cmd):
+		self.hub = hub
+		self.cmd = cmd
+		
+	def get_fragment(self):
+		sync = [
+			self.hub.call.eq(self.cmd.stb & self.cmd.ack & (self.cmd.is_read | self.cmd.is_write)),
+			self.hub.tag_call.eq(self.cmd.tag)
+		]
+		return Fragment(sync=sync)
+
+def main():
+	hub = Hub(12, 128, 2)
+	initiator = Initiator(hub.get_port(), my_generator())
+	hub.finalize()
+	
+	dut = BankMachine(sdram_geom, sdram_timing, 2, 0, hub.get_slots())
+	logger = CommandLogger(dut.cmd, True)
+	completer = Completer(hub, dut.cmd)
+	
+	def end_simulation(s):
+		s.interrupt = initiator.done
+	
+	fragment = hub.get_fragment() + initiator.get_fragment() + \
+		dut.get_fragment() + logger.get_fragment() + completer.get_fragment() + \
+		Fragment(sim=[end_simulation])
+	sim = Simulator(fragment, Runner(), TopLevel("my.vcd"))
+	sim.run()
+
+main()
diff --git a/tb/asmicon/common.py b/tb/asmicon/common.py
index 01d761b5..70e64e34 100644
--- a/tb/asmicon/common.py
+++ b/tb/asmicon/common.py
@@ -1,9 +1,44 @@
+from fractions import Fraction
+from math import ceil
+
 from migen.fhdl.structure import *
 from migen.sim.generic import Proxy
 
+from milkymist import asmicon
+
+MHz = 1000000
+clk_freq = (83 + Fraction(1, 3))*MHz
+
+clk_period_ns = 1000000000/clk_freq
+def ns(t, margin=True):
+	if margin:
+		t += clk_period_ns/2
+	return ceil(t/clk_period_ns)
+
+sdram_geom = asmicon.GeomSettings(
+	bank_a=2,
+	row_a=13,
+	col_a=10
+)
+sdram_timing = asmicon.TimingSettings(
+	tRP=ns(15),
+	tRCD=ns(15),
+	tWR=ns(15),
+	tREFI=ns(7800, False),
+	tRFC=ns(70),
+	
+	CL=3,
+	rd_delay=4,
+
+	slot_time=16,
+	read_time=32,
+	write_time=16
+)
+
 class CommandLogger:
-	def __init__(self, cmd):
+	def __init__(self, cmd, rw=False):
 		self.cmd = cmd
+		self.rw = rw
 	
 	def do_simulation(self, s):
 		elts = ["@" + str(s.cycle_counter)]
@@ -38,7 +73,11 @@ class CommandLogger:
 			print("\t".join(elts))
 	
 	def get_fragment(self):
-		return Fragment(sim=[self.do_simulation])
+		if self.rw:
+			comb = [self.cmd.ack.eq(1)]
+		else:
+			comb = []
+		return Fragment(comb, sim=[self.do_simulation])
 
 class SlotsLogger:
 	def __init__(self, slicer, slots):
diff --git a/tb/asmicon/selector.py b/tb/asmicon/selector.py
index c5f88dd1..fbeee455 100644
--- a/tb/asmicon/selector.py
+++ b/tb/asmicon/selector.py
@@ -5,16 +5,9 @@ from migen.bus.asmibus import *
 from migen.sim.generic import Simulator, TopLevel
 from migen.sim.icarus import Runner
 
-from milkymist import asmicon
 from milkymist.asmicon.bankmachine import _AddressSlicer, _Selector, _Buffer
 
-from common import SlotsLogger
-
-sdram_geom = asmicon.GeomSettings(
-	bank_a=2,
-	row_a=13,
-	col_a=10
-)
+from common import SlotsLogger, sdram_geom
 
 def my_generator(dt, offset):
 	for t in range(dt):