From: Dmitry Selyutin Date: Tue, 11 Apr 2023 18:27:23 +0000 (+0300) Subject: ppc/svp64: support min/max instructions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=187e610d707bcb52c9acb49e25618b72c8a322c9;p=binutils-gdb.git ppc/svp64: support min/max instructions --- diff --git a/gas/testsuite/gas/ppc/minmax.d b/gas/testsuite/gas/ppc/minmax.d new file mode 100644 index 00000000000..2a0c60e61d3 --- /dev/null +++ b/gas/testsuite/gas/ppc/minmax.d @@ -0,0 +1,32 @@ +#as: -mlibresoc +#objdump: -dr -Mlibresoc + +.*: file format .* + + +Disassembly of section \.text: +0+ <\.text>: +.*:\s+(5b e0 00 9c|9c 00 e0 5b)\s+minu\s+r31,r0,r0 +.*:\s+(58 1f 00 9c|9c 00 1f 58)\s+minu\s+r0,r31,r0 +.*:\s+(58 00 f8 9c|9c f8 00 58)\s+minu\s+r0,r0,r31 +.*:\s+(5b e0 00 9d|9d 00 e0 5b)\s+minu.\s+r31,r0,r0 +.*:\s+(58 1f 00 9d|9d 00 1f 58)\s+minu.\s+r0,r31,r0 +.*:\s+(58 00 f8 9d|9d f8 00 58)\s+minu.\s+r0,r0,r31 +.*:\s+(5b e0 01 9c|9c 01 e0 5b)\s+maxu\s+r31,r0,r0 +.*:\s+(58 1f 01 9c|9c 01 1f 58)\s+maxu\s+r0,r31,r0 +.*:\s+(58 00 f9 9c|9c f9 00 58)\s+maxu\s+r0,r0,r31 +.*:\s+(5b e0 01 9d|9d 01 e0 5b)\s+maxu.\s+r31,r0,r0 +.*:\s+(58 1f 01 9d|9d 01 1f 58)\s+maxu.\s+r0,r31,r0 +.*:\s+(58 00 f9 9d|9d f9 00 58)\s+maxu.\s+r0,r0,r31 +.*:\s+(5b e0 02 9c|9c 02 e0 5b)\s+mins\s+r31,r0,r0 +.*:\s+(58 1f 02 9c|9c 02 1f 58)\s+mins\s+r0,r31,r0 +.*:\s+(58 00 fa 9c|9c fa 00 58)\s+mins\s+r0,r0,r31 +.*:\s+(5b e0 02 9d|9d 02 e0 5b)\s+mins.\s+r31,r0,r0 +.*:\s+(58 1f 02 9d|9d 02 1f 58)\s+mins.\s+r0,r31,r0 +.*:\s+(58 00 fa 9d|9d fa 00 58)\s+mins.\s+r0,r0,r31 +.*:\s+(5b e0 03 9c|9c 03 e0 5b)\s+maxs\s+r31,r0,r0 +.*:\s+(58 1f 03 9c|9c 03 1f 58)\s+maxs\s+r0,r31,r0 +.*:\s+(58 00 fb 9c|9c fb 00 58)\s+maxs\s+r0,r0,r31 +.*:\s+(5b e0 03 9d|9d 03 e0 5b)\s+maxs.\s+r31,r0,r0 +.*:\s+(58 1f 03 9d|9d 03 1f 58)\s+maxs.\s+r0,r31,r0 +.*:\s+(58 00 fb 9d|9d fb 00 58)\s+maxs.\s+r0,r0,r31 diff --git a/gas/testsuite/gas/ppc/minmax.s b/gas/testsuite/gas/ppc/minmax.s new file mode 100644 index 00000000000..1d43d2848b5 --- /dev/null +++ b/gas/testsuite/gas/ppc/minmax.s @@ -0,0 +1,24 @@ +minu 31,0,0 +minu 0,31,0 +minu 0,0,31 +minu. 31,0,0 +minu. 0,31,0 +minu. 0,0,31 +maxu 31,0,0 +maxu 0,31,0 +maxu 0,0,31 +maxu. 31,0,0 +maxu. 0,31,0 +maxu. 0,0,31 +mins 31,0,0 +mins 0,31,0 +mins 0,0,31 +mins. 31,0,0 +mins. 0,31,0 +mins. 0,0,31 +maxs 31,0,0 +maxs 0,31,0 +maxs 0,0,31 +maxs. 31,0,0 +maxs. 0,31,0 +maxs. 0,0,31 diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index 63503b66788..286f1fe30cc 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -163,3 +163,4 @@ run_dump_test "svremap" run_dump_test "svindex" run_dump_test "fmvis" run_dump_test "fishmv" +run_dump_test "minmax" diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 3cfb95a5999..f9a4cb3f68b 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -7032,6 +7032,15 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"svremap", SVRM(22,57), SVRM_MASK, SVP64, PPCVLE, {SVme, mi0, mi1, mi2, mo0, mo1, pst}}, +{"minu", XRC(22,78,0), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, +{"minu.", XRC(22,78,1), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, +{"maxu", XRC(22,206,0), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, +{"maxu.", XRC(22,206,1), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, +{"mins", XRC(22,334,0), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, +{"mins.", XRC(22,334,1), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, +{"maxs", XRC(22,462,0), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, +{"maxs.", XRC(22,462,1), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, + {"rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, PPCVLE|EXT, {RA, RS, RB}}, {"rlwnm", M(23,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, {"rlnm", M(23,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}},