From: lkcl <lkcl@web>
Date: Sat, 26 Dec 2020 17:38:45 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~834
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=18b023b2304a8c10c2d9ed4383076e5f35a5199e;p=libreriscv.git

---

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 528f3a9da..ff6a541e3 100644
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -501,3 +501,7 @@ but select different *bits* of the same CRs
 
 `offs` is defined as CR32 (4x8) so as to mesh cleanly with Vectorised Rc=1 operations (see below).  Rc=1 operations start from CR8 (TBD).
 
+# Appendix
+
+Now at its own page: [[svp64/appendix]]
+