From: Luke Kenneth Casson Leighton Date: Sun, 7 Jun 2020 12:12:19 +0000 (+0100) Subject: if referred to through GPR (GPR[RA]), add to read_regs in parser X-Git-Tag: div_pipeline~510 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=18db92ba0f33dfcd036eeddbc42c54eb3cf06ce3;hp=11134dd94c4a1d1c1cff15e75d12b50c19c80b36;p=soc.git if referred to through GPR (GPR[RA]), add to read_regs in parser --- diff --git a/src/soc/decoder/isa/comparefixed.patch b/src/soc/decoder/isa/comparefixed.patch index b80e7be4..56cdefcc 100644 --- a/src/soc/decoder/isa/comparefixed.patch +++ b/src/soc/decoder/isa/comparefixed.patch @@ -51,7 +51,7 @@ return (CR,) @inject() -- def op_cmpeqb(self, RB, CR): +- def op_cmpeqb(self, RA, RB, CR): - src1 = GPR[RA] - src1 = src1[56:64] + def op_cmpeqb(self, RA, RB, CR): @@ -70,12 +70,3 @@ return (CR,) comparefixed_instrs = {} -@@ -136,7 +135,7 @@ - form='X', - asmregs=[['BF', 'L', 'RA', 'RB']]) - comparefixed_instrs['cmpeqb'] = instruction_info(func=op_cmpeqb, -- read_regs=OrderedSet(['RB']), -+ read_regs=OrderedSet(['RA', 'RB']), - uninit_regs=OrderedSet(), write_regs=OrderedSet(['CR']), - special_regs=OrderedSet(['CR']), op_fields=OrderedSet(['BF']), - form='X', diff --git a/src/soc/decoder/pseudo/parser.py b/src/soc/decoder/pseudo/parser.py index 3e84646b..53f4afcc 100644 --- a/src/soc/decoder/pseudo/parser.py +++ b/src/soc/decoder/pseudo/parser.py @@ -369,6 +369,9 @@ class PowerParser: print(astor.dump_tree(p[1])) # replace GPR(x) with GPR[x] idx = p[1].args[0] + # and add index to read_regs if it is a gpr + if idx in self.gprs: + self.read_regs.add(name) p[1] = ast.Subscript(p[1].func, idx, ast.Load()) elif isinstance(p[1], ast.Call) and p[1].func.id == 'MEM': print("mem assign")