From: lkcl <lkcl@web>
Date: Sat, 23 May 2020 18:04:53 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2599
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=18f65db3cf31336fd6a73c5544ac424f2a9843ad;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/regfile.mdwn b/3d_gpu/architecture/regfile.mdwn
index fd7f3b656..8f5f04d69 100644
--- a/3d_gpu/architecture/regfile.mdwn
+++ b/3d_gpu/architecture/regfile.mdwn
@@ -71,6 +71,8 @@ Click on the image to expand it full-screen:
 
 # Regspecs
 
+* Source: <https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/fu/regspec.py;hb=HEAD>
+
 "Regspecs" is a term used for describing the relationship between register files,
 register file ports, register widths, and the Computation Units that they connect
 to.