From: lkcl <lkcl@web>
Date: Thu, 2 Sep 2021 14:10:05 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~253
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=194bcf336292a46427e3b6bcfe162181aaa15c29;p=libreriscv.git

---

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index 8b2fd5687..da0848aad 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -194,7 +194,7 @@ testing options have been added.
 
 If both CTR-test and VLSET Modes are requested, then because the CTR decrement is on a per element basis, the total amount that CTR is decremented
 by will end up being VL *after* truncation (should that occur). In
-other words, the order is (as can be seen in pseudocode, below):
+other words, the order is strictly (as can be seen in pseudocode, below):
 
 1. compute the test
 2. (optionally) decrement CTR
@@ -266,6 +266,8 @@ is useful to know but in others all that is needed is the branch itself.
 branch offsets: the offset is relative to the start of the instruction,
 which includes the SVP64 Prefix*
 
+# Pseudocode and examples
+
 Pseudocode for Horizontal-First Mode:
 
 ```