From: lkcl Date: Fri, 4 Jun 2021 18:52:11 +0000 (+0100) Subject: (no commit message) X-Git-Tag: DRAFT_SVP64_0_1~793 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1973e4062ac4eec8b22625fba474380528157c51;p=libreriscv.git --- diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index 2130c1b1b..e4c781693 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -117,14 +117,14 @@ All of the following instructions use the standard OpenPower conversion to/from Integer operands and results being in the GPR is the key differentiator between the proposed instructions (the entire rationale) compated to existing Scalar Power ISA. -All existing Power ISA Scalar conversion instructions, all +In all existing Power ISA Scalar conversion instructions, all operands are FPRs, even if the format of the source or destination data is actually a scalar integer. Note that source and destination widths can be overridden by SimpleV SVP64, and that SVP64 also has Saturation Modes *in addition* to those independently described here. SVP64 Overrides and Saturation -work on *both* Fixed *and* Floating Point. +work on *both* Fixed *and* Floating Point operands and results. The interactions with SVP64 are explained in the [[int_fp_mv/appendix]]