From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 23 Jul 2022 10:37:26 +0000 (+0100)
Subject: reduce table size
X-Git-Tag: opf_rfc_ls005_v1~1101
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1993ce445fae1cfdbc34c39c20d495763e93e801;p=libreriscv.git

reduce table size
---

diff --git a/openpower/sv/comparison_table.mdwn b/openpower/sv/comparison_table.mdwn
index 3cd936c7d..1cba3fda9 100644
--- a/openpower/sv/comparison_table.mdwn
+++ b/openpower/sv/comparison_table.mdwn
@@ -1,13 +1,13 @@
 
-|ISA <br>name  |Num <br>opcodes|Taxonomy / <br> Class|setvl <br> scalable|Predicate <br> Masks|Twin <br> Predication|Explicit <br> Vector regs|128-bit <br> operations|Bigint <br> capability|LDST <br> Fault-First|Data-dependent <br> Fail-first|Predicate-<br> Result|Matrix HW<br> support|
-|--------------|---------------|---------------------|-------------------|--------------------|---------------------|-------------------------|-----------------------|----------------------|---------------------|------------------------------|---------------------|---------------------|
-|Draft SVP64   |5 (1)          |Scalable (2)         |yes                |yes                 |yes (3)              |no (4)                   |see (5)                |yes (6)               |yes (7)              |yes (8)                       |yes (9)              |yes (10)             |
-|VSX           |700+           |Packed SIMD          |no                 |no                  |no                   |yes (11)                 |yes                    |no                    |no                   |no                            |no                   |yes (12)             |
-|NEON          |~250 (13)      |Predicated SIMD      |no                 |yes                 |no                   |yes                      |yes                    |no                    |no                   |no                            |no                   |no                   |
-|SVE2          |~1000 (14)     |Predicated SIMD (15) |no (15)            |yes                 |no                   |yes                      |yes                    |no                    |yes (7)              |no                            |no                   |no                   |
-|AVX-512 (16)  |~1000s (17)    |Predicated SIMD      |no                 |yes                 |no                   |yes                      |yes                    |no                    |no                   |no                            |no                   |no                   |
-|RVV (18)      |~190           |Scalable (19)        |yes                |yes                 |no                   |yes                      |yes (20)               |no                    |yes                  |no                            |no                   |no                   |
-|Aurora SX (21)|~200 (22)      |Scalable (23)        |yes                |yes                 |no                   |yes                      |no                     |no                    |no                   |no                            |no                   |no                   |
+|ISA<br>name   |Num<br>opcodes|Taxonomy /<br>Class |setvl<br>scalable|Predicate<br>Masks|Twin<br>Predication|Explicit<br>Vector regs|128-bit<br>operations|Bigint<br>capability|LDST<br>Fault-First|Data-dependent<br>Fail-first|Predicate-<br>Result|Matrix HW<br>support|
+|--------------|--------------|--------------------|-----------------|------------------|-------------------|-----------------------|---------------------|--------------------|-------------------|----------------------------|--------------------|--------------------|
+|Draft SVP64   |5 (1)         |Scalable (2)        |yes              |yes               |yes (3)            |no (4)                 |see (5)              |yes (6)             |yes (7)            |yes (8)                     |yes (9)             |yes (10)            |
+|VSX           |700+          |Packed SIMD         |no               |no                |no                 |yes (11)               |yes                  |no                  |no                 |no                          |no                  |yes (12)            |
+|NEON          |~250 (13)     |Predicated SIMD     |no               |yes               |no                 |yes                    |yes                  |no                  |no                 |no                          |no                  |no                  |
+|SVE2          |~1000 (14)    |Predicated SIMD (15)|no (15)          |yes               |no                 |yes                    |yes                  |no                  |yes (7)            |no                          |no                  |no                  |
+|AVX-512 (16)  |~1000s (17)   |Predicated SIMD     |no               |yes               |no                 |yes                    |yes                  |no                  |no                 |no                          |no                  |no                  |
+|RVV (18)      |~190          |Scalable (19)       |yes              |yes               |no                 |yes                    |yes (20)             |no                  |yes                |no                          |no                  |no                  |
+|Aurora SX (21)|~200 (22)     |Scalable (23)       |yes              |yes               |no                 |yes                    |no                   |no                  |no                 |no                          |no                  |no                  |
 
 * (1): plus EXT001 24-bit prefixing. See [[sv/svp64]]
 * (2): A 2-Dimensional Scalable Vector ISA with both Horizontal-First and Vertical-First Modes. See [[sv/vector_isa_comparison]]