From: lkcl <lkcl@web>
Date: Tue, 21 Jun 2022 09:40:05 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1a0dfe945a9557ec1ac83ec6cef4319ac021d788;p=libreriscv.git

---

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index f3c5d5144..77bd0c042 100644
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -5,6 +5,7 @@
 * <https://bugs.libre-soc.org/show_bug.cgi?id=574> Saturation
 * <https://bugs.libre-soc.org/show_bug.cgi?id=558#c47> Parallel Prefix
 * <https://bugs.libre-soc.org/show_bug.cgi?id=697> Reduce Modes
+* <https://bugs.libre-soc.org/show_bug.cgi?id=864> parallel prefix simulator
 * <https://bugs.libre-soc.org/show_bug.cgi?id=809> OV sv.addex discussion
 
 This is the appendix to [[sv/svp64]], providing explanations of modes