From: Kwok Cheung Yeung <kcy@codesourcery.com>
Date: Thu, 14 Nov 2019 23:37:13 +0000 (+0000)
Subject: Check suitability of spill register for mode
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=1a4ec3250596b03e1b2edcfbc9d903c1f189f077;p=gcc.git

Check suitability of spill register for mode

2019-11-14  Kwok Cheung Yeung  <kcy@codesourcery.com>

	gcc/
	* lra-spills.c (assign_spill_hard_regs): Check that the spill
	register is suitable for the mode.

From-SVN: r278267
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 240bda5789c..a811edbcc56 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-11-14  Kwok Cheung Yeung  <kcy@codesourcery.com>
+
+	* lra-spills.c (assign_spill_hard_regs): Check that the spill
+	register is suitable for the mode.
+
 2019-11-14  Andrew MacLeod  <amacleod@redhat.com>
 
 	* range-op.h (range_operator::fold_range): Return a bool.
diff --git a/gcc/lra-spills.c b/gcc/lra-spills.c
index 54f76ccf864..8fbd3a8a2f2 100644
--- a/gcc/lra-spills.c
+++ b/gcc/lra-spills.c
@@ -283,7 +283,8 @@ assign_spill_hard_regs (int *pseudo_regnos, int n)
       for (k = 0; k < spill_class_size; k++)
 	{
 	  hard_regno = ira_class_hard_regs[spill_class][k];
-	  if (TEST_HARD_REG_BIT (eliminable_regset, hard_regno))
+	  if (TEST_HARD_REG_BIT (eliminable_regset, hard_regno)
+	      || !targetm.hard_regno_mode_ok (hard_regno, mode))
 	    continue;
 	  if (! overlaps_hard_reg_set_p (conflict_hard_regs, mode, hard_regno))
 	    break;